參數(shù)資料
型號(hào): KS9241B
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: CD-ROM Decoder(光盤(pán)驅(qū)動(dòng)器解碼器)
中文描述: 的CD - ROM解碼器(光盤(pán)驅(qū)動(dòng)器解碼器)
文件頁(yè)數(shù): 16/37頁(yè)
文件大?。?/td> 211K
代理商: KS9241B
KS9241B
CD-ROM DECODER
16
(iii) Input signal format in case MLSL =
L
,CPSL =
H
.
This mode is available to interface with DSP ICs for CDP such as TC 9200F from TOSHIBA.
Figure 11.
(iv) This mode is prohibited from use in case MLSL =
H
,CPSL =
H
.
(b) Block Sync
The Sync of KS9241B is controlled by the sync detected from the external input data through sync pattern and the
internal sync through built-in circuits. DSYEN bit of CONT2 register makes the sync from the external input enabled
and GSYEN bit of CONT2 register makes internal sync enabled. DSYEN and GSYEN are both set to
1
so as to
recover the loss of Track Jump and sync pattern quickly which may occur.
But, in repeat correction mode, DSYEN should be set at
0
and GSYEN at
1
because then there is no need for
the sync from input data. Both DSYEN and GSYEN are prohibited to be set at
0
at once. Regarding sync state, it
can be displayed by NOGSY, NODSY, LNGBLK, STRBLK flag of STATE 1 register.
LPCH
BCLK
SDI
C2P0
`H`=Lch
`L`=Rch
C2 point latch
MSB
LSB
0
15
14
MS byte C2 pointer
LS byte C2 pointer
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
15
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