參數(shù)資料
型號(hào)： KS9241B
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： CD-ROM Decoder(光盤驅(qū)動(dòng)器解碼器)
中文描述： 的CD - ROM解碼器（光盤驅(qū)動(dòng)器解碼器）
文件頁(yè)數(shù)： 28/37頁(yè)
文件大小： 211K
代理商： KS9241B
KS9241B
CD-ROM DECODER
28
ADDRESS DECODER:
It consists of 4 bits and enables the internal register according to address output. When MRS and /MCS are
“
L
”
,
the address input to select register should be applied by micom before access to address. In case of address (1-
14), access automatically adds one.
In case of address 15, it is
“
0
”
. If the address is
“
0
”
, the address remains
“
1
”
regardless of accessing register. But,
MRS is then
“
H
”
, and when MRS is
“
L
”
, only the reading register makes micom read the address for the selecting
register.
INFORMATION ABOUT THE REGISTER ACCESSED BY MICOM
COMD (Command) Register:
This register is designed to read commands written by the host and consists of an 8 byte FIFO.
ISTATE (Interface State) Register
/CDINT (Command Interrupt):
If 0, it indicates that there is command byte on CDMD register.
If 1, it indicates that COMD register is empty.
/DTINT (Data Transfer Interrupt):
If 0, transmission stop register Interrupt is generated.
The Interrupt is dissolved by writing into DTEACK register.
/DCINT (Decoder Interrupt):
Decoder Interrupt is generated if
“
0
”
.
The Interrupt is dissolved by reading of STATE 2.
/DTUOP (Data Transfer Unit Operation):
If
“
0
”
, the data transmission circuit is operative.
/STUOP (Status Transfer Unit Operation):
If
“
0
”
, the data transmission circuit is operative.
/DTOPR (Data Transfer Unit Operation):
If
“
0
”
, Data transmission is performed.
/STOPR (Status Transfer Operation):
If
“
0
”
, status is being transmitted.
DTBCL (Data Transfer Byte Counter Low) Register
DTBCH (Data Transfer Byte Counter High) register:
It is a counter to count the transmitted byte number during data transmission to host. DTBCL is LSB 8 bits and
DTBCH is MSB 4 bits. Both are 12-bit Down-Counter. The information (the byte number to be transmitted, minus
one ) about data volume, is to be transmitted to host and is supposed to be applied from host.
HEADER 1-4 Register
This register is able to read header and subheader according to SHREN bit of CONT 2 register. When SHREN = 0,
the HEADER 4 register in HEADER 1 indicates minutes, seconds, blocks, mode in header. If SHREN = 1,
HEADER 4 register in HEADER 1 indicates file number, channel number, subcode number, coding information of
each subheader.
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