參數(shù)資料
型號(hào): KS9241B
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: CD-ROM Decoder(光盤驅(qū)動(dòng)器解碼器)
中文描述: 的CD - ROM解碼器(光盤驅(qū)動(dòng)器解碼器)
文件頁數(shù): 18/37頁
文件大?。?/td> 211K
代理商: KS9241B
KS9241B
CD-ROM DECODER
18
(c) Descrambling
Since CD ROM Disc is scrambled according to Polynomial X
15
+ X+1, it is required to descramble the CD ROM
Disc to restore the original data before storing the data. The data is stored by the 9-bit (Data 8-bit and Error Flag 1-
bit) at RAM. Scrambling is aimed to reduce the possibility of the same pattern as sync signal, and is performed for
2340 byte of 2352 byte, excluding sync data 12 byte. Besides, both circuits of scrambler and descrambler are same
and the configuration is as follows.
Figure 14.
DECODING BLOCK
The data written in CD-ROM Disc will have the format as follows depending on the mode and form.
Error correction is available in case of Form 1 of mode 1 or mode 2, and it is not available in case of form 2 of
mode 2. Real time error correction can be started on condition that the data of over 1 block (2352 byte) is buffered
at RAM. If the command of correction is given by micom, KS9241B will read data from RAM and generate
syndrome after that the value of error location is measured. As a result, error correction will start.
In CD-ROM, RS [26, 24] [45, 43] are used as code and called P code and Q code respectively. The error correction
of CD-ROM are performed in terms of 2340 byte excluding sync data. Both the lower byte of 16-bit 1 word data
written at even-numbered RAM address and the higher byte written in odd-numbered RAM address, are, LSB
plane and MSB plane, decoded by the 1176 byte.
12
4
2048
4
8
276
ECC
276
byte
Mode 1
Sync
12
Header
4
User Data
EDC
Space
4
8
2048
byte
Mode 2
Form 1
Sync
Header
Subheader
User Data
EDC
ECC
12
4
8
2048
4
byte
Mode 2
Form 1
Sync
Header
Subheader
User Data
EDC or Space
15 bit Shift Register
Preset Value
Bit Clock
Output data
Input data
(LSB First)
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