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參數(shù)資料
| 型號： | KS9241B |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | CD-ROM Decoder(光盤驅(qū)動器解碼器) |
| 中文描述： | 的CD - ROM解碼器（光盤驅(qū)動器解碼器） |
| 文件頁數(shù)： | 21/37頁 |
| 文件大?。?/td> | 211K |
| 代理商： | KS9241B |
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CD-ROM DECODER
KS9241B
21
(iv) MRS =
“
H
”
, /MRD =
“
H
”
, /HWR =
“
L
”
, (Register write):
The micom data is written into the register selected by address decoder.
(b) Command Transferring
Host is enabled to set /HCS and /CMD at
“
L
”
and writes command byte into COMD register. Micom is available to
read command byte by setting /MCS at
“
L
”
and MRS at
“
H
”
. If no command byte is written into COMD register, FF
(16 binary number) will be out through micom data bus in case micom starts to read COMD register. Also, on
condition that although all data are written at command FIFO of 8 byte, host may write another comman byte, and
the later written data can be neglected.
If the command byte is existed at COMD register, command interrupt is generated and /CDINT bit of ISTATE
register is set to
“
0
”
.
Then, if the CDIEN bit of ICONT register is
“
1
”
, /INT pin will be
“
L
”
.
Figure 15.
NOTE:
Condition: /HCS =
“
L
”
, /CMD =
“
L
”
, /HRD =
“
H
”
.
/MCS =
“
L
”
, MRS =
“
H
”
, /MWR =
“
H
”
, Address Decoder =
“
0
”
(C) Status Transferring
(i) Normal Operation
On condition that STUEN bit of ICONT register is
“
1
”
, micom is enabled to transmit the status byte to the host.
Writing the micom data into STATUS register for the status byte transmission is available only when /STUOP bit of
ISTATE register is
“
1
”.
Meanwhile, if the bit is
“
0
”
, the status byte written already will disappear. Normal operation
occurs when /STWT bit of ICONT register is
“
1
”
. After the writing into STATUS register, /STUOP and /STOPR bits
of ISTATE register will be
“
0
”
and /SREN pin is
“
L
”
. Host is enabled to set /HCS pin at
“
L
”
and /CMD pin at
“
L
”
and
read status byte on condition that /SREN pin is
“
L
”
. When host starts to read status byte from STATUS register, /
STUOP bit of ISTATE register will be set to
“
1
”
and /SREN pin to
“
H
”
. After reading is over, /STOPR bit of ISTATE
register will be set to
“
1
”
. If host reads the data while micom is writing the data into STATUS register, invalid data
will be out through host. At this moment, /STUOP bit of ISTATE register will be
“
0
”
after writing of micom data.
However, /STOPR bit will be
“
0
”
and /SREN pin will be
“
L
”
only after reading is finished.
<Command Transmission Timing>
C1
C2
C8
C9
CA
CB
CC
C1
C2
C8
CB
CC
FF
/HWR
HD7-0
/MRD
MD7-0
/COINT
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