- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373180 > KS9241B (SAMSUNG SEMICONDUCTOR CO. LTD.) CD-ROM Decoder(光盤驅(qū)動器解碼器) PDF資料下載
參數(shù)資料
| 型號： | KS9241B |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | CD-ROM Decoder(光盤驅(qū)動器解碼器) |
| 中文描述： | 的CD - ROM解碼器（光盤驅(qū)動器解碼器） |
| 文件頁數(shù)： | 31/37頁 |
| 文件大?。?/td> | 211K |
| 代理商： | KS9241B |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁當(dāng)前第31頁第32頁第33頁第34頁第35頁第36頁第37頁
CD-ROM DECODER
KS9241B
31
/CMDBK (Command Break):
If
“
0
”
, and the host writes commands, during the status transmission into host, the transmission of data or
status will be stopped.
/DTWT (Data Wait):
If
“
1
”
, the data transmission into host is performed irrelative to the status transmission.
If
“
0
”
, on condition that /SREN bit is
“
L
”
, the status transmission operation is delayed.
/STWT (Status Wait):
If
“
1
”
, the status transmission to host is performed irrelative to the data transmission.
If
“
0
”
, on condition that /DREN bit is
“
L
”
the status transmission operation is delayed.
DTUEN (Data Transfer Unit Enable):
If the data bit is set to
“
1
”
, the data transmission circuit is enabled to operate.
During data transmission, the transmission is stopped if the data bit is
“
0
”
.
STUEN (Status Unit Enable):
If the data bit is set to
“
1
”
, the data transmission circuit is enabled to operate.
When the data bit is
“
0
”
, during status transmission, the transmitting operation is stopped.
DTACL(Data Transfer Address Counter Low) /DTACH (Data Transfer Address Counter High) Register
It is a counter to indicate the transmission data address while data transmitting into the host. When the start
address of data to be transmitted from micom is applied into this register, the counter value will be increased
automatically by one as one byte is transmitted.
DTSTR ( Data Transfer Start) Register
The writing into this register starts the data transmission into the host.
The data to be written is
“
Don
’
t care
”
.
DTEACK (Data Transfer End Acknowledge) register
/DTINT is set to
“
1
”
with the writing operation in this register. While writing data, the data is
“
Don
’
t care
”
.
CONT1 (Control1) Register
DECEN (Decoder Enable):
If the data bit is
“
1
”
, buffering, ECC and EDC are performed and the established bit of BUFEN, QCOEN,
PCOEN of CONT1 register are valid.
If the data bit is
“
0
”
, the Decoder is not operational. However, the establishment of the above flag is available
and the flag will be valid when DECOPR becomes
“
1
”
.
ERRCEN (Error Correction Enable):
If the data bit is
“
1
”
, the error correction is enabled to operate.
AUTCEN (Auto Correction Enable):
When the data is
“
1
”
, the error correction is performed on condition that form 1 is available by form of bit within
the subheader.
On the contrary, the error correction is not operational in case of form 2. This flag is valid only if MODSEL bit of
CONT2 register is
“
1
”
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KS9245 | Automated CD-ROM Controller(光盤驅(qū)動器控制器器) |
| KS9246 | ATAPI AUTOMATED CD-ROM CONTROLLER WITH EMBEDDED DRAM |
| KS9284 | Digital Signal Processor(數(shù)字信號處理器) |
| KSA1013 | PNP (COLOR TV AUDIO OUTPUT) |
| KSA1013 | Color TV Audio Output Color TV Vertical Deflection Output |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KS9246 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:ATAPI AUTOMATED CD-ROM CONTROLLER WITH EMBEDDED DRAM |
| KS926S2 | 制造商:FUJI 制造商全稱:Fuji Electric 功能描述:LOW LOSS SUPER HIGH SPEED RECTIFIER |
| KS926S2_07 | 制造商:FUJI 制造商全稱:Fuji Electric 功能描述:LOW LOSS SUPER HIGH SPEED RECTIFIER |
| KS9282B | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:CMOS INTEGRATED CIRCUIT |
| KS9286 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DIGITAL SIGNAL PROCESSOR for CDP |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。