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參數(shù)資料
| 型號： | LH28F320S3H-L |
| 廠商： | Sharp Corporation |
| 英文描述： | 32 M-bit(4 MB x 8/2 MB x 16)Smart3 Flash Memories(32M位 (4M位 x 8/2M位 x 16) Smart3 技術(shù)閃速存儲器) |
| 中文描述： | 32 M位（4字節(jié)× 8 / 2 MB的× 16）Smart3閃存（32兆位（4分位x 8/2M位× 16）Smart3技術(shù)閃速存儲器） |
| 文件頁數(shù)： | 42/51頁 |
| 文件大?。?/td> | 340K |
| 代理商： | LH28F320S3H-L |
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NOTES :
1.
Read timing characteristics during block erase, full chip
erase, (multi) word/byte write and block lock-bit
configuration operations are the same as during read-
only operations. Refer to
Section 6.2.4 "AC
CHARACTERISTICS"
for read-only operations.
2.
Sampled, not 100% tested.
LH28F320S3-L/S3H-L
6.2.5 AC CHARACTERISTICS - WRITE OPERATIONS
(NOTE 1)
V
CC
= 2.7 to 3.6 V, T
A
= 0 to +70
C or
–
40 to +85°C
VERSIONS
LH28F320S3-L11
LH28F320S3H-L11
MIN.
140
1
10
55
100
100
50
50
5
5
10
30
LH28F320S3-L14
LH28F320S3H-L14
MIN.
160
1
10
55
100
100
50
50
5
5
10
30
UNIT
SYMBOL
t
AVAV
t
PHWL
t
ELWL
t
WLWH
t
SHWH
t
VPWH
t
AVWH
t
DVWH
t
WHDX
t
WHAX
t
WHEH
t
WHWL
t
WHRL
t
WHGL
t
QVVL
t
QVSL
PARAMETER
NOTE
MAX.
MAX.
Write Cycle Time
RP# High Recovery to WE# Going Low
CE# Setup to WE# Going Low
WE# Pulse Width
WP# V
IH
Setup to WE# Going High
V
PP
Setup to WE# Going High
Address Setup to WE# Going High
Data Setup to WE# Going High
Data Hold from WE# High
Address Hold from WE# High
CE# Hold from WE# High
WE# Pulse Width High
WE# High to STS Going Low
Write Recovery before Read
V
PP
Hold from Valid SRD, STS High Z
WP# V
IH
Hold from Valid SRD, STS High Z
ns
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2
2
2
3
3
100
100
0
0
0
0
0
0
2, 4
2, 4
VERSIONS
LH28F320S3-L11
LH28F320S3H-L11
MIN.
110
1
10
55
100
100
50
50
5
5
10
30
LH28F320S3-L14
LH28F320S3H-L14
MIN.
140
1
10
55
100
100
50
50
5
5
10
30
UNIT
SYMBOL
t
AVAV
t
PHWL
t
ELWL
t
WLWH
t
SHWH
t
VPWH
t
AVWH
t
DVWH
t
WHDX
t
WHAX
t
WHEH
t
WHWL
t
WHRL
t
WHGL
t
QVVL
t
QVSL
PARAMETER
NOTE
MAX.
MAX.
Write Cycle Time
RP# High Recovery to WE# Going Low
CE# Setup to WE# Going Low
WE# Pulse Width
WP# V
IH
Setup to WE# Going High
V
PP
Setup to WE# Going High
Address Setup to WE# Going High
Data Setup to WE# Going High
Data Hold from WE# High
Address Hold from WE# High
CE# Hold from WE# High
WE# Pulse Width High
WE# High to STS Going Low
Write Recovery before Read
V
PP
Hold from Valid SRD, STS High Z
WP# V
IH
Hold from Valid SRD, STS High Z
ns
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2
2
2
3
3
100
100
0
0
0
0
0
0
2, 4
2, 4
V
CC
= 3.3±0.3 V, T
A
= 0 to +70
C or
–
40 to +85°C
3.
Refer to
Table 3
for valid A
IN
and D
IN
for block erase,
full chip erase, (multi) word/byte write or block lock-bit
configuration.
V
PP
should be held at V
PPH1/2/3
until determination of
block erase, full chip erase, (multi) word/byte write or
block lock-bit configuration success (SR.1/3/4/5 = 0).
4.
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|---|---|
| LH28F320S3H-L11 | 制造商:SHARP 制造商全稱:Sharp Electrionic Components 功能描述:32-MBIT(4MBx8/2MBx16)Smart 3 Flash MEMORY |
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| LH28F320S3HNS-L14 | 制造商:SHARP 制造商全稱:Sharp Electrionic Components 功能描述:32-MBIT(4MBx8/2MBx16)Smart 3 Flash MEMORY |
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