Table of Contents
LH77790B User’s Guide
vi
Register Description...................................................................................................5-8
START and STOP Registers (STARTn, STOPn)...................................................5-8
Example .............................................................................................................5-8
Segment Descriptor Registers (SDRn) ..................................................................5-9
System/User Privileges ....................................................................................5-10
Cacheability......................................................................................................5-10
Half-Word Mode (HW)......................................................................................5-10
Bank Selection .................................................................................................5-11
Reset Value......................................................................................................5-11
Bank Control Registers (BCRn) ...........................................................................5-11
BCR0 - BCR5.......................................................................................................5-11
MS....................................................................................................................5-12
WAIT ................................................................................................................5-12
ECE..................................................................................................................5-12
BCR6a and BCR7a ..............................................................................................5-13
MS....................................................................................................................5-13
FCAS................................................................................................................5-13
ECAS................................................................................................................5-14
BCR6b and BCR7b ..............................................................................................5-15
DRAM Refresh Register (DRR)............................................................................5-16
Example 1 ........................................................................................................5-16
Example 2 ........................................................................................................5-17
DRAM Controller......................................................................................................5-17
DRAM Access Mode ............................................................................................5-17
DRAM Page Size .................................................................................................5-17
DRAM Address Bus Multiplex ..............................................................................5-17
Memory Cycles Calculation......................................................................................5-20
Definition ..............................................................................................................5-20
On-chip (Local) SRAM .........................................................................................5-20
External Memory Devices ....................................................................................5-21
Non-DRAM (SRAM, ROM, EPROM, Flash...)......................................................5-21
DRAM...................................................................................................................5-22
Normal Mode....................................................................................................5-22
Page Mode.......................................................................................................5-22
Memory Cycle Diagrams..........................................................................................5-23
Chapter 6 Clock & Power Management
Introduction.................................................................................................................6-1
Features.....................................................................................................................6-1
Block Diagram ...........................................................................................................6-2
Register Map..............................................................................................................6-2
Power Modes .............................................................................................................6-3
Active Mode............................................................................................................6-3
Standby Mode ........................................................................................................6-3
Sleep Mode ............................................................................................................6-4
Stop Mode..............................................................................................................6-4
XCLKDIS Output ....................................................................................................6-4