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參數(shù)資料
| 型號： | M36DR432B |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product |
| 中文描述： | 32兆位的2Mb x16插槽，雙行，頁閃存和4兆位256K x16的SRAM，多個存儲產(chǎn)品 |
| 文件頁數(shù)： | 17/46頁 |
| 文件大小： | 328K |
| 代理商： | M36DR432B |
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M36DR432A, M36DR432B
Table 17. Status Register Bits
(1)
Note: 1. Logic level '1' is High, '0' is Low. -0-1-0-0-0-1-1-1-0- represent bit value in successive Read operations.
2. In case of double word program DQ7 refers to the last word input.
DQ
Name
Logic Level
Definition
Note
7
Data
Polling
'1'
Erase Complete or erase block
in Erase Suspend.
Indicates the P/E.C. status, check
during Program or Erase, and on
completion before checking bits DQ5
for Program or Erase Success.
'0'
Erase On-going
DQ
Program Complete or data of
non erase block during Erase
Suspend.
DQ
Program On-going
(2)
6
Toggle Bit
'-1-0-1-0-1-0-1-'
Erase or Program On-going
Successive reads output
complementary data on DQ6 while
Programming or Erase operations are
on-going. DQ6 remains at constant
level when P/E.C. operations are
completed or Erase Suspend is
acknowledged.
DQ
Program Complete
'-1-1-1-1-1-1-1-'
Erase Complete or Erase
Suspendon currentlyaddressed
block
5
Error Bit
'1'
Program or Erase Error
This bit is set to '1' in the case of
Programming or Erase failure.
'0'
Program or Erase On-going
4
Reserved
3
Erase Time
Bit
'1'
Erase Timeout Period Expired
P/E.C. Erase operation has started.
Only possible command entry is Erase
Suspend (ES)
'0'
Erase Timeout Period On-going
An additional block to be erased in
parallel can be entered to the P/E.C:
2
Toggle Bit
'-1-0-1-0-1-0-1-'
Erase Suspend read in the
Erase Suspended Block.
Erase Error due to the currently
addressed block (when DQ5 =
'1').
Indicates the erase status and allows
to identify the erased block.
1
Program on-going or Erase
Complete.
DQ
Erase Suspend read on non
Erase Suspend block.
1
Reserved
0
Reserved
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