參數(shù)資料
型號(hào)： M36DR432B
廠商： 意法半導(dǎo)體
英文描述： 32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product
中文描述： 32兆位的2Mb x16插槽，雙行，頁(yè)閃存和4兆位256K x16的SRAM，多個(gè)存儲(chǔ)產(chǎn)品
文件頁(yè)數(shù)： 35/46頁(yè)
文件大?。?/td> 328K
代理商： M36DR432B
35/46
M36DR432A, M36DR432B
Table 31. SRAM Read AC Characteristics
(T
A
= –40 to 85°C; V
DDS
= 1.65V to 2.2V)
Note: 1. Sampled only. Not 100% tested.
Figure 16. SRAM Read Mode AC Waveforms, Address Controlled with UBS = LBS = V
IL
Note: E1S = Low, E2S = High, GS = Low, WS = High.
Symbol
Alt
Parameter
SRAM
Unit
Min
Max
t
AVAV
t
RC
Read Cycle Time
100
ns
t
AVQV
t
AA
Address Valid to Output Valid
100
ns
t
AXQX
t
OH
Address Transition to Output Transition
15
ns
t
BHQZ
t
BHZ
UBS, LBS Disable to Hi-Z Output
25
ns
t
BLQV
t
BA
UBS, LBS Access Time
100
ns
t
BLQX
t
BLZ
UBS, LBS Enable to Low-Z Output
5
ns
t
E1HQZ
t
HZ1
Chip Enable 1 High to Output Hi-Z
0
30
ns
t
E1LQV
t
CO1
Chip Enable 1 Low to Output Valid
100
ns
t
E1LQX
t
LZ1
Chip Enable 1 Low to Output Transition
10
ns
t
E2HQV
t
CO2
Chip Enable 2 High to Output Valid
100
ns
t
E2HQX
t
LZ2
Chip Enable 2 High to Output Transition
10
ns
t
E2LQZ
t
HZ2
Chip Enable 2 Low to Output Hi-Z
0
25
ns
t
GHQZ
t
OHZ
Output Enable High to Output Hi-Z
0
30
ns
t
GLQV
t
OE
Output Enable Low to Output Valid
35
ns
t
GLQX
t
OLZ
Output Enable Low to Output Transition
5
ns
t
PD(1)
Chip Enable 1 High or Chip Enable 2 Low to Power
Down
100
ns
t
PU(1)
Chip Enable 1 Low or Chip Enable 2 High to Power Up
0
ns
AI90217
tAVAV
tAVQV
tAXQX
A0-A17
DQ0-DQ15
VALID
DATA VALID
DATA VALID
相關(guān)PDF資料
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M36DR432B120ZA6C 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product
M36DR432B120ZA6T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product
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