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參數(shù)資料
| 型號(hào)： | M5M5Y5636TG-25 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM |
| 中文描述： | 18874368位（524288 - Word的36位）網(wǎng)絡(luò)的SRAM |
| 文件頁數(shù)： | 25/27頁 |
| 文件大?。?/td> | 212K |
| 代理商： | M5M5Y5636TG-25 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁當(dāng)前第25頁第26頁第27頁
MITSUBISHI LSIs
M5M5Y5636TG – 25,22,20
18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM
25
MITSUBISHI
ELECTRIC
Advanced Information
M5M5Y5636TG REV.0.0
JTAG TAP INSTRUCTION SET SUMMARY
Instruction
Code
Description
EXTEST-A
000
Captures I/O ring contents. Places the Boundary Scan Register between TDI and TDO.
This SRAM implements an Clock Assisted EXTEST function. Not 1149.1 Compliant.
Preloads ID Register and places it between TDI and TDO
Captures I/O ring contents. Places the Boundary Scan Register between TDI and TDO.
Forces all Data and Clock output drivers to High-Z
Do not use this instruction; Reserved for Future Use.
Captures I/O ring contents. Places the Boundary Scan Register between TDI and TDO.
Do not use this instruction; Reserved for Future Use.
Do not use this instruction; Reserved for Future Use.
Places the BYPASS Register between TDI and TDO.
IDCODE
001
SAMPLE-Z
010
RFU
011
100
101
110
111
SAMPLE/PRELOAD
RFU
RFU
BYPASS
STRUCTURE OF IDENTIFICATION REGISTER
Device Information
Capacity
Revision
V
DD
Function
Width
Gen.
JEDEC Vendor Code of MITSUBISHI
Bit No.
M5M5Y5636
31
0
30
0
29
0
28
0
27
0
26
1
25
0
24
0
23
1
22
0
21
1
20
0
19
1
18
0
17
0
16
0
15
1
14
1
13
0
12
0
11
0
10
0
9
0
8
0
7
0
6
0
5
1
4
1
3
1
2
0
1
0
0
1
MSB
LSB
Note38. Bit of Device Information “Gen.(Generation)” means
Bit No.
13
12
1
st
Generation
0
2
nd
Generation
0
3
rd
Generation
1
Note39. Bit of Device Information ”Width” means
Bit No.
16
15
X16
0
X18
0
X32
0
X36
0
X64
1
X72
1
Note40. Bit of Device Information ”Function” means
Bit No.
20
19
Network SRAM
0
PB
0
Note41. Bit of Device Information ”Capacity” means
Bit No.
24
23
1M or 1.15M
0
2M or 2.3M
0
4M or 4.5M
0
8M or 9M
0
16M or 18M
0
32M or 36M
0
Note42. Bit of Device Information ”V
DD
” means
Bit No.
27
26
3.3V
0
2.5V
0
1.8V
0
1.5V
0
0
1
0
14
0
1
0
1
0
1
0
0
1
1
0
0
18
0
0
17
0
1
1
0
22
0
1
1
0
0
1
21
1
0
1
0
1
0
0
0
0
1
1
1
25
0
1
0
1
0
0
1
1
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