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MB90560 series
APPENDIX B INSTRUCTIONS
513
Table B.8-4 Increment/decrement (byte, word, long-word): 12 instructions
<Caution>
See Table B.5-1, "Number of execution cycles for each type of addressing," and Table B.5-2,
"Compensation values for calculating the number of execution cycles," for (a) to (d) in the
above table.
Table B.8-5 Comparison (byte, word, long-word): 11 instructions
<Caution>
See Table B.5-1, "Number of execution cycles for each type of addressing," and Table B.5-2,
"Compensation values for calculating the number of execution cycles," for (a) to (d) in the
above table.
Mnemonic
ear
eam
#
2
~
RG
2
0
B
0
Operation
LH
-
-
AH
-
-
I
-
-
S
-
-
T
-
-
N
Z
V
C
-
-
RMW
-
*
INC
INC
DEC
DEC
ear
eam
2+
2
2+
3
5+(a)
3
5+(a)
2
0
2×(b)
0
2×(b)
byte (ear)
←
(ear) + 1
byte (eam)
←
(eam) + 1
byte (ear)
←
(ear) - 1
byte (eam)
←
(eam) - 1
word (ear)
←
(ear) + 1
word (eam)
←
(eam) + 1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
INCW
INCW
ear
eam
DECW
DECW
ear
eam
2
2+
2
2+
3
5+(a)
3
5+(a)
2
0
2
0
0
2×(c)
0
2×(c)
word (ear)
←
(ear) - 1
word (eam)
←
(eam) - 1
long (ear)
←
(ear) + 1
long (eam)
←
(eam) + 1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
INCL
INCL
ear
eam
DECL
DECL
ear
eam
2
2+
2
2+
7
9+(a)
7
9+(a)
4
0
4
0
0
2×(d)
0
2×(d)
long (ear)
←
(ear) - 1
long (eam)
←
(eam) - 1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Mnemonic
#
~
RG
B
Operation
LH
AH
I
S
T
N
Z
V
C
RMW
CMP
CMP
CMP
CMP
A
A,ear
A,eam
A,#imm8
1
2
2+
2
1
2
3+(a)
2
0
1
0
0
0
0
(b)
0
byte (AH) - (AL)
byte (A) - (ear)
byte (A) - (eam)
byte (A) - imm8
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
CMPW
CMPW
CMPW
CMPW
A
A,ear
A,eam
A,#imm16
1
2
2+
3
1
2
3+(a)
2
0
1
0
0
0
0
(c)
0
word (AH) - (AL)
word (A) - (ear)
word (A) - (eam)
word (A) - imm16
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
CMPL
CMPL
CMPL
A,ear
A,eam
A,#imm32
2
2+
5
6
7+(a)
3
2
0
0
0
(d)
0
long (A) - (ear)
long (A) - (eam)
long (A) - imm32
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-