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CHAPTER 2 CPU
MB90560 series
2.9
2.9.4 Restrictions on Prefix Codes
Prefix Codes
The following three restrictions are imposed on the use of prefix codes:
Interrupt/hold requests are not accepted during the execution of prefix codes
and interrupt/hold suppression instructions.
If a prefix code is placed before an interrupt/hold instruction, the effect of the
prefix code is delayed.
If consecutively placed prefix codes conflict, the last prefix code is valid.
I
Prefix codes and interrupt/hold suppression instructions
Table 2.9-6 lists the interrupt/hold suppression instructions and prefix codes that have
restrictions.
Table 2.9-6 Prefix codes and interrupt/hold suppression instructions
G
Interrupt/hold suppression
As shown in Figure 2.9-1, an interrupt or hold request generated during the execution of prefix
codes and interrupt/hold instructions is not accepted. The interrupt/hold is not processed until
the first instruction that is not governed by a prefix code or that is not an interrupt/hold
suppression instruction is executed.
Figure 2.9-1 Interrupt/hold suppression
Prefix codes
Interrupt/hold suppression instructions (instructions that
delay the effect of prefix codes)
Instructions that do not
accept interrupt and hold
requests
PCB
DTB
ADB
SPB
CMR
NCC
MOV
OR
AND
POPW PS
ILM, #imm8
CCR, #imm8
CCR, #imm8
Interrupt/hold suppression instruction
Interrupt request generated
Interrupt accepted
(a) Ordinary instruction