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參數(shù)資料
| 型號： | MBM29F017-12 |
| 廠商： | Fujitsu Limited |
| 英文描述： | 16M (2M ×8) Bit Flash Memory( 單5V 電源電壓2M ×8閃速存儲器) |
| 中文描述： | 1,600（2米× 8）位快閃記憶體（單5V的電源電壓200萬× 8閃速存儲器） |
| 文件頁數(shù)： | 17/48頁 |
| 文件大小： | 548K |
| 代理商： | MBM29F017-12 |
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17
MBM29F017
-90/-12
DQ
7
Data Polling
The MBM29F017 device features Data Polling as a method to indicate to the host that the embedded algorithms
are in progress or completed. During the Embedded Program
TM
Algorithm, an attempt to read the device will
produce the complement of the data last written to DQ
7
. Upon completion of the Embedded Program
TM
Algorithm,
an attempt to read the device will produce the true data last written to DQ
7
. During the Embedded Erase
TM
Algorithm, an attempt to read the device will produce a “0” at the DQ
7
output. Upon completion of the Embedded
Erase
TM
Algorithm an attempt to read the device will produce a “1” at the DQ
7
output. The flowchart for Data
Polling (DQ
7
) is shown in Figure 17.
Data polling will also flag the entry into Erase Suspend. DQ
7
will switch “0” to “1” at the start of the Erase Suspend
mode. Please note that the address of an erasing sector must be applied in order to observe DQ
7
in the Erase
Suspend Mode.
During Program in Erase Suspend, Data polling will perform the same as in regular program execution outside
of the suspend mode.
For chip erase, the Data Polling is valid after the rising edge of the sixth WE pulse in the six write pulse sequence.
For sector erase, the Data Polling is valid after the last rising edge of the sector erase WE pulse. Data Polling
must be performed at sector address within any of the sectors being erased and not a sector that is within a
protected sector group. Otherwise, the status may not be valid.
Just prior to the completion of Embedded Algorithm operation DQ
7
may change asynchronously while the output
enable (OE) is asserted low. This means that the device is driving status information on DQ
7
at one instant of
time and then that byte's valid data at the next instant of time. Depending on when the system samples the DQ
7
output, it may read the status or valid data. Even if the device has completed the Embedded Algorithm operations
and DQ
7
has a valid data, the data outputs on DQ
0
to DQ
6
may be still invalid. The valid data on DQ
0
to DQ
7
will
be read on the successive read attempts.
The Data Polling feature is only active during the Embedded Programming Algorithm, Embedded Erase Algo-
rithm, Erase Suspend, erase-suspend-program mode, or sector erase time-out. (See Table 7.)
See Figure 8 for the Data Polling timing specifications and diagrams.
DQ
6
Toggle Bit I
The MBM29F017 also features the “Toggle Bit I” as a method to indicate to the host system that the embedded
algorithms are in progress or completed.
During an Embedded Program or Erase Algorithm cycle, successive attempts to read (OE toggling) data from
the device at any address will result in DQ
6
toggling between one and zero. Once the Embedded Program or
Erase Algorithm cycle is completed, DQ
6
will stop toggling and valid data will be read on the nextsuccessive
attempts. During programming, the Toggle Bit I is valid after the rising edge of the fourth WE pulse in the four
write pulse sequence. For chip erase, the Toggle Bit I is valid after the rising edge of the sixth WE pulse in the
six write pulse sequence. For Sector Erase, the Toggle Bit I is valid after the last rising edge of the sector erase
WE pulse. The Toggle Bit I is active during the sector erase time out.
Either CE or OE toggling will cause the DQ
6
to toggle. In addition, an Erase Suspend/Resume command will
cause DQ
6
to toggle. See Figure 9 for the Toggle Bit I timing specifications and diagrams.
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PDF描述 |
|---|---|
| MBM29F017-90 | 16M (2M ×8) Bit Flash Memory( 單5V 電源電壓2M ×8閃速存儲器) |
| MBM29F017A | 2.2A, 2.7-5.5V Single Hot-Swap IC Hi-Side MOSFET, Fault Report, Act-High Enable 8-SOIC -40 to 85 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MBM29F017A | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16M (2M X 8) BIT |
| MBM29F017A-12 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:FLASH MEMORY CMOS 16M (2M x 8) BIT |
| MBM29F017A-12PFTN | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16M (2M X 8) BIT |
| MBM29F017A-12PFTR | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:FLASH MEMORY CMOS 16M (2M x 8) BIT |
| MBM29F017A-12PNS | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:FLASH MEMORY CMOS 16M (2M x 8) BIT |
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