3
MBM29LV400T
-10/-12
/MBM29LV400B
-10/-12
I
DESCRIPTION
The MBM29LV400T/B are a 4M-bit, 3.0 V-only Flash memory organized as 512K bytes of 8 bits each or 256K
words of 16 bits each. The MBM29LV400T/B are offered in a 48-pin TSOP (I), 44-pin SOP and 46-pin SON
packages. These devices are designed to be programmed in-system with the standard system 3.0 V V
12.0 V V
PP
and 5.0 V V
CC
are not required for write or erase operations. The device can also be reprogrammed
in standard EPROM programmers.
CC
supply.
The standard MBM29LV400T/B offer access times100 ns and 120 ns, allowing operation of high-speed
microprocessors without wait states. To eliminate bus contention the devices have separate chip enable (CE),
write enable (WE) and output enable (OE) controls.
The MBM29LV400T/B are pin and command set compatible with JEDEC standard E
written to the command register using standard microprocessor write timings. Register contents serve as input
to an internal state-machine which controls the erase and programming circuitry. Write cycles also internally
latch addresses and data needed for the programming and erase operations. Reading data out of the device is
similar to reading from 5.0 V and 12.0 V Flash or EPROM devices.
2
PROMs. Commands are
The MBM29LV400T/B are programmed by executing the program command sequence. This will invoke the
Embedded Program Algorithm which is an internal algorithm that automatically times the program pulse widths
and verifies proper cell margin. Typically, each sector can be programmed and verified in about 0.5 seconds.
Erase is accomplished by executing the erase command sequence. This will invoke the Embedded Erase
Algorithm which is an internal algorithm that automatically preprograms the array if it is not already programmed
before executing the erase operation. During erase, the devices automatically time the erase pulse widths and
verify proper cell margin.
A sector is typically erased and verified in 1.0 second. (If already completely preprogrammed.)
The devices also feature a sector erase architecture. The sector mode allows each sector to be erased and
reprogrammed without affecting other sectors. The MBM29LV400T/B are erased when shipped from the factory.
The devices feature single 3.0 V power supply operation for both read and write functions. Internally generated
and regulated voltages are provided for the program and erase operations. A low V
inhibits write operations on the loss of power. The end of program or erase is detected by Data Polling of DQ
by the Toggle Bit feature on DQ
6
, or the RY/BY output pin. Once the end of a program or erase cycle has been
completed, the device internally resets to the read mode.
CC
detector automatically
7
,
Fujitsu’s Flash technology combines years of EPROM and E
of quality, reliability and cost effectiveness. The MBM29LV400T/B memories electrically erase the entire chip or
all bits within a sector simultaneously via Fowler-Nordhiem tunneling. The bytes/words are programmed one
byte/word at a time using the EPROM programming mechanism of hot electron injection.
2
PROM experience to produce the highest levels