參數(shù)資料
型號(hào)： MC33989
廠商： 飛思卡爾半導(dǎo)體(中國)有限公司
元件分類： CAN
英文描述： System Basis Chip with High Speed CAN Transceiver(帶高速CAN收發(fā)器的系統(tǒng)基片)
中文描述： 系統(tǒng)基礎(chǔ)芯片的高速CAN收發(fā)器（帶高速的CAN收發(fā)器的系統(tǒng)基片）
文件頁數(shù)： 11/32頁
文件大小： 676K
代理商： MC33989
MC33989
11
MC33989
Figure 5. Wake up block diagram
The block diagram illustrates how the wake up signal is generated. First the CAN signal is detected by a low consumption
receiver (WU receiver). Then the signal passes through a pulse width filter which discards the undesired pulses. The pulse must
have a width bigger than 0.5us and smaller than 500us to be acepted. When a pulse is discarded the pulse counter is reseted
and no wake signal is generated, otherwise when a pulse is acepted the pulse counter is incremented and after three pulses the
wake signal is asserted.
Each one of the pulses must be spaced by no more than 500us. In that case the pulse counter is reset and no wake signal is
generated. This is accomplished by the wake time-out generator. The wake up cycle is completed (and the wake flag reset)
when the CAN interface is brought to “CAN normal” mode.
The wake up capability of the CAN can be disabled, refer to SPI interface and register section, CAN register.
diagram to be inserted
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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