參數(shù)資料
型號(hào)： MC33989
廠商： 飛思卡爾半導(dǎo)體(中國)有限公司
元件分類： CAN
英文描述： System Basis Chip with High Speed CAN Transceiver(帶高速CAN收發(fā)器的系統(tǒng)基片)
中文描述： 系統(tǒng)基礎(chǔ)芯片的高速CAN收發(fā)器（帶高速的CAN收發(fā)器的系統(tǒng)基片）
文件頁數(shù)： 3/32頁
文件大?。?/td> 676K
代理商： MC33989
MC33989
3
MC33989
2
ELECTRICAL CHARACTERISTICS
(V
sup
From 5.5V to 18V and Tamb -40°C to 125°C)
For all pins except CANH, CANL, Tx and Rx which are described in the CAN module section
Description
Symbol
Characteristics
Unit
Conditions
Min
Typ
Max
Vsup pin (Device power supply)
Nominal DC Voltage range
Vsup
5.5
18
V
Extended DC Voltage range 1
Vsup-ex1
4.5
5.5
V
Reduced functionality
(note 1)
Extended DC Voltage range 2
Vsup-ex2
18
27
V
(note 3)
Input Voltage during Load Dump
VsupLD
40
V
Load dump situation
Input Voltage during jump start
VsupJS
27
V
Jump start situation
Supply Current in Stand-by Mode
(note 2,4) (includes 10mA at Vdd1)
Isup(stdby)
12
17
mA
Iout at Vdd1 =10mA
CAN recessive or sleep-
disable state
Supply Current in Normal Mode (note 2)
Isup(norm)
12.5
17
mA
Iout at Vdd1 =10mA
CAN recessive or sleep-
disable state
Supply Current in Sleep Mode (note 2,4)
Isup
(sleep1)
72
105
uA
Vdd1 & V2 off, Vsup<12V,
oscillator running (note5)
CAN in sleep-disable state
Supply Current in Sleep Mode (note 2,4)
Isup
(sleep2)
57
90
uA
Vdd1 & V2 off, Vsup<12V
oscillator not running (5)
CAN in sleep-disable state
Supply current in sleep mode (note 2,4)
Isup
(sleep3)
100
150
uA
Vdd1 & V2 off, Vsup>12V
oscillator running (5)
CAN in sleep-disable state
Supply Current in Stop mode (note 2,4)
I out Vdd1 <2mA
Isup
(stop1)
135
210
uA
Vdd1 on, Vsup<12V
oscillator running (5)
CAN in sleep-disable state
Supply Current in Stop mode (note 2,4)
I out Vdd1 <2mA
Isup
(stop2)
130
410
uA
Vdd1 on, Vsup<12V
oscillator not running (5)
CAN in sleep-disable state
Supply Current in Stop mode (note 2,4)
Iout Vdd1 < 2mA
Isup
(stop3)
160
230
uA
Vdd on, Vsup>12
oscillator running (5)
CAN in sleep-disable state
BATFAIL Flag internal threshold
VBF
1.5
3
4
V
BATFAIL Flag hysteresis
VBF hyst
1
V
guaranteed by design
Battery fall early warning threshold
BFew
5.3
5.8
6.3
V
In normal & standby mode
Battery fall early warning hysteresis
BFewh
0.1
0.2
0.3
V
In normal & standby mode
guaranteed by design
note 1: Vdd1>4V, reset high, logic pin high level reduced, device is functional.
note 2: Current measured at Vsup pin.
note 3: Device is fully functional. All functions are operating (All mode available and operating, Watchdog, HS1 turn ON turn OFF, CAN cell
operating, L0 to L3 inputs operating, SPI read write operation). Over temperature may occur.
note 4: With CAN cell in sleep-disable state. If CAN cell is sleep-enabled for wake up, an additional 60uA must be added to specified value.
note 5: Oscillator running means “Forced Wake up” or “Cyclic Sense” or “Software Watchdog in stop mode” timer activated. Oscillator not
running means that “Forced Wake up” and “cyclic Sense” and “Software Watchdog in stop mode” are not activated.
Vdd1 (external 5V output for MCU supply). Idd1 is the total regulator output current. Vdd specification with external capacitor. Sta-
bility requirement: C>47uF ESR < 1.3 ohms (tantalum capacitor)
In reset, normal request, normal and standby modes.
Measures with C=47uF Tantalum.
Vdd1 Output Voltage
Vdd1out
4.9
5
5.1
V
Idd1 from 2 to 200mA
Tamb -40°C to 125°C
5.5V< Vsup <27V
Vdd1 Output Voltage
Vdd1out
4
V
Idd1 from 2 to 200mA
4.5V< Vsup <5.5V
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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