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M68040 USER’S MANUAL
MOTOROLA
LIST OF ILLUSTRATIONS (Continued)
Figure
Number
Page
Number
Title
9-9
9-10
9-11
Format of Denormalized Operand in State Frame.......................................
MC68040 Floating-Point State Frames........................................................
Mapping of Command Bits for CMDREG3B Field .......................................
9-24
9-40
9-42
10-1
10-2
10-3
Simple Instruction Timing Example..............................................................
Instruction Overlap with Multiple Clocks ......................................................
Interlocked Stages .......................................................................................
10-5
10-6
10-7
11-1
11-2
11-3
11-4
11-5
11-6
11-7
11-8
11-9
11-10
11-11
Clock Input Timing Diagram.........................................................................
Drive Levels and Test Points for AC Specifications.....................................
Read/Write Timing .......................................................................................
Bus Arbitration Timing..................................................................................
Snoop Hit Timing .........................................................................................
Snoop Miss Timing ......................................................................................
Other Signal Timing .....................................................................................
MC68040 Termination Network ...................................................................
Typical Configuration for RC Termination Network......................................
Heat Sink with Adhesive ..............................................................................
Heat Sink with Attachment...........................................................................
11-3
11-6
11-7
11-8
11-9
11-10
11-11
11-15
11-15
11-20
11-21
12-1
12-2
PGA Package Dimensions...........................................................................
QFP Package Dimensions...........................................................................
12-9
12-10
A-1
A-2
A-3
A-4
A-5
A-6
A-7
A-8
A-9
MC68LC040 Block Diagram ........................................................................
MC68LC040 Programming Model ...............................................................
MC68LC040 Functional Signal Groups........................................................
Clock Input Timing Diagram.........................................................................
Read/Write Timing .......................................................................................
Bus Arbitration Timing..................................................................................
Snoop Hit Timing .........................................................................................
Snoop Miss Timing ......................................................................................
Other Signal Timing .....................................................................................
A-2
A-3
A-4
A-10
A-13
A-14
A-15
A-16
A-17
B-1
B-2
B-3
B-4
B-5
B-6
B-7
B-8
B-9
MC68EC040 Block Diagram........................................................................
MC68EC040 Programming Model...............................................................
MC68EC040 Functional Signal Groups .......................................................
MC68EC040 Access Control Register Format ............................................
MC68EC040 Initial Power-On Reset Timing................................................
MC68EC040 Normal Reset Timing..............................................................
Clock Input Timing Diagram.........................................................................
Read/Write Timing .......................................................................................
Bus Arbitration Timing..................................................................................
B-2
B-3
B-4
B-6
B-8
B-9
B-14
B-17
B-18