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M68040 USER’S MANUAL
MOTOROLA
LIST OF TABLES
Table
Number
Page
Number
Title
1-1
1-2
1-3
1-4
M68040 Data Formats .................................................................................
Effective Addressing Modes ........................................................................
Notational Conventions................................................................................
Instruction Set Summary..............................................................................
1-9
1-10
1-11
1-14
3-1
3-2
Updating U-Bit and M-Bit for Page Descriptors............................................
SFC and DFC Values...................................................................................
3-22
3-22
4-1
4-2
4-3
4-4
Snoop Control Encoding..............................................................................
TLNx Encoding ............................................................................................
Instruction-Cache Line State Transitions .....................................................
Data-Cache Line State Transitions ..............................................................
4-9
4-11
4-15
4-17
5-1
5-2
5-3
5-4
5-5
5-6
5-7
Signal Index .................................................................................................
Transfer-Type Encoding ..............................................................................
Normal and MOVE16 Access Transfer Modifier Encoding ..........................
Alternate Access Transfer Modifier Encoding..............................................
Output Driver Control Groups ......................................................................
Processor Status Encoding..........................................................................
Signal Summary...........................................................................................
5-2
5-5
5-6
5-6
5-11
5-13
5-16
6-1
6-2
IEEE Standard 1149.1A Instructions ...........................................................
Boundary Scan Bit Definitions .....................................................................
6-3
6-10
7-1
7-2
7-3
Data Bus Requirements for Read and Write Cycles....................................
Summary of Access Types versus Bus Signal Encodings...........................
Memory Alignment Influence on Noncachable and
Write-Through Bus Cycles .........................................................................
Interrupt Acknowledge Termination Summary.............................................
TA
and
TEA
Assertion Results.....................................................................
M68040 Bus Arbitration States ....................................................................
7-4
7-6
7-9
7-31
7-37
7-48
7-4
7-5
7-6
8-1
8-2
8-3
8-4
Exception Vector Assignments ....................................................................
Tracing Control ............................................................................................
Interrupt Levels and Mask Values................................................................
Exception Priority Groups ............................................................................
8-5
8-11
8-12
8-19