參數(shù)資料
型號: MC68HC05L1B
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP56
封裝: SDIP-56
文件頁數(shù): 57/102頁
文件大?。?/td> 632K
代理商: MC68HC05L1B
MOTOROLA
7-4
MC68HC05L1
LIQUID CRYSTAL DISPLAY DRIVER
7
purposes. In the Control register 2, the three bits LCDP0, LCDP1 and LCDP2 are used to select
the appropriate divider for various input clock frequencies.
Table 7-3 illustrates the prescaler internal processor clock division versus bit levels. Users are
responsible to select the appropriate divider according to the input clock frequency. For example,
if the 4x multiplex is selected,
÷64 (LCDP2=LCDP1=LCDP0=0) should be selected for a 32KHz
input clock;
÷8192 (LCDP2=LCDP1=LCDP0=1) should be selected for a 4MHz input clock.
Figure 7-2 LCD Voltage Level Divider
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
LCD Prescaler Register
$0B
LCDP2 LCDP1 LCDP0 0000 0000
Table 7-3 LCD Prescaler Division Versus Bit Levels
LCDP2
LCDP1
LCDP0
Internal processor clock
divide by
000
64
001
128
010
256
011
512
1
0
1024
1
0
1
2048
1
0
4096
1
8192
R3
R2
R1
VLCD
VH
VL
(pad input)
VLCD
V0
DON
(Bit 4 of General Control register)
VSS
TPG
56
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