參數(shù)資料
型號(hào): MC8610TVT1066JB
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 48/96頁(yè)
文件大?。?/td> 0K
描述: MPU E600 CORE 1066MHZ 783-PBGA
標(biāo)準(zhǔn)包裝: 36
系列: MPC86xx
處理器類型: 32-位 MPC86xx PowerPC
速度: 1.066GHz
電壓: 1V
安裝類型: 表面貼裝
封裝/外殼: 783-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 783-FCPBGA(29x29)
包裝: 托盤
MPC8610 Integrated Host Processor Hardware Specifications, Rev. 2
Electrical Characteristics
Freescale Semiconductor
52
2.16
PCI Interface
This section describes the DC and AC electrical specifications for the PCI bus interface.
2.16.1
PCI DC Electrical Characteristics
Table 45 provides the DC electrical characteristics for the PCI interface.
2.16.2
PCI AC Electrical Specifications
This section describes the general AC timing parameters of the PCI bus. Note that the SYSCLK signal is used as the PCI input
clock. Table 46 provides the PCI AC timing specifications at 66 MHz.
Table 45. PCI DC Electrical Characteristics1
Parameter
Symbol
Min
Max
Unit
High-level input voltage
VIH
2OVDD + 0.3
V
Low-level input voltage
VIL
–0.3
0.8
V
Input current (VIN
2 = 0 V or V
IN = VDD)IIN
—±5
μA
High-level output voltage (OVDD = min, IOH = –100 μA)
VOH
OVDD – 0.2
V
Low-level output voltage (OVDD = min, IOL = 100 μA)
VOL
—0.2
V
Notes:
1. Ranges listed do not meet the full range of the DC specifications of the
PCI 2.2 Local Bus Specifications.
2. The symbol VIN, in this case, represents the OVIN symbol referenced in Table 2 and Table 3.
Table 46. PCI AC Timing Specifications at 66 MHz
Parameter
Symbol1
Min
Max
Unit
Notes
SYSCLK to output valid
tPCKHOV
1.5
7.4
ns
2, 3, 12
SYSCLK to output high impedance
tPCKHOZ
14
ns
2, 4, 11
Input setup to SYSCLK
tPCIVKH
3.7
ns
2, 5, 10,
13
Input hold from SYSCLK
tPCIXKH
0.8
ns
2, 5, 10,
14
REQ64 to HRESET 9 setup time
tPCRVRH
10
× tSYS
clocks
6, 7, 11
HRESET to REQ64 hold time
tPCRHRX
050
ns
7, 11
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