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參數(shù)資料
| 型號(hào)： | MC8610TVT1066JB |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 55/96頁 |
| 文件大小： | 0K |
| 描述： | MPU E600 CORE 1066MHZ 783-PBGA |
| 標(biāo)準(zhǔn)包裝： | 36 |
| 系列： | MPC86xx |
| 處理器類型： | 32-位 MPC86xx PowerPC |
| 速度： | 1.066GHz |
| 電壓： | 1V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 783-BBGA，F(xiàn)CBGA |
| 供應(yīng)商設(shè)備封裝： | 783-FCPBGA（29x29） |
| 包裝： | 托盤 |
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Electrical Characteristics
MPC8610 Integrated Host Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
59
Figure 35. AC-Coupled Differential Connection with LVDS Clock Driver (Reference Only)
Figure 36 shows the SerDes reference clock connection reference circuits for LVPECL type clock driver. Since LVPECL
driver’s DC levels (both common mode voltages and output swing) are incompatible with MPC8610 SerDes reference clock
input’s DC requirement, AC-coupling has to be used. Figure 36 assumes that the LVPECL clock driver’s output impedance is
50
Ω. R1 is used to DC-bias the LVPECL outputs prior to AC-coupling. Its value could be ranged from 140 to 240 Ω depending
on clock driver vendor’s requirement. R2 is used together with the SerDes reference clock receiver’s 50-
Ω termination resistor
to attenuate the LVPECL output’s differential peak level such that it meets the MPC8610 SerDes reference clock’s differential
input amplitude requirement (between 200 and 800 mV differential peak). For example, if the LVPECL output’s differential
peak is 900 mV and the desired SerDes reference clock input amplitude is selected as 600 mV, the attenuation factor is 0.67,
which requires R2 = 25
Ω. Please consult clock driver chip manufacturer to verify whether this connection scheme is compatible
with a particular clock driver chip.
Figure 36. AC-Coupled Differential Connection with LVPECL Clock Driver (Reference Only)
SD
n_REF_CLK
SD
n_REF_CLK
Clock Driver
100
Ω Differential PWB Trace
CLK_Out
LVDS CLK Driver Chip
10 nF
MPC8610
SerDes Refer.
CLK Receiver
50
Ω
50
Ω
Clock Driver
SD
n_REF_CLK
SD
n_REF_CLK
Clock Driver
100
Ω Differential PWB Trace
SerDes Refer.
CLK Receiver
Clock Driver
CLK_Out
LVPECL CLK Driver Chip
R2
MPC8610
10 nF
CLK_Out
R2
R1
Clock Driver
50
Ω
50
Ω
R1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 345-012-523-804 | CARDEDGE 12POS DUAL .100 GREEN |
| MC8610PX1333JB | MPU E600 CORE 1333MHZ 783-PBGA |
| 345-012-523-802 | CARDEDGE 12POS DUAL .100 GREEN |
| 345-012-523-801 | CARDEDGE 12POS DUAL .100 GREEN |
| MC8610PX1066JB | MPU E600 CORE 1066MHZ 783-PBGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC8610TVT1066JZ | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC8610 Integrated Host Processor Hardware Specifications |
| MC8610TVT1067G | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Host Processor Hardware Specifications |
| MC8610TVT1067J | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Host Processor Hardware Specifications |
| MC8610TVT1333JB | 制造商:Freescale Semiconductor 功能描述:MPC8XXX RISC 32-BIT 0.09UM 1.333GHZ 1.8V/2.5V/3.3V 783-PIN B - Bulk |
| MC8610TVT667FB | 功能描述:微處理器 - MPU REV 1.1 8610 1.0V -40C RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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