參數(shù)資料
型號(hào): MC92600
廠商: Motorola, Inc.
英文描述: High-speed, Full-duplex, Serial Data Interface(高速全雙工串行數(shù)據(jù)接口)
中文描述: 高速,全雙工,串行數(shù)據(jù)接口(高速全雙工串行數(shù)據(jù)接口)
文件頁數(shù): 55/82頁
文件大小: 1056K
代理商: MC92600
Chapter 6. Electrical SpeciTcations and Characteristics
6-9
Electrical Characteristics
6.1.3.8 Recovered Clock
The timing diagram for the recovered clock is shown in Figure 6-8.
Figure 6-8. Recovered Clock Timing Diagram
Table 6-12 shows the timing speciTcations for the recovered clock.
6.1.3.9 Link Differential Output
The transmitter timing diagram for the link differential output is shown in Figure 6-9.
Figure 6-9. Link Differential Output Timing Diagram
3
Full speed (HSE = Low), normal data rate (DDRE = Low).
Half speed (HSE = High), normal data rate (DDRE = Low); and full speed (HSE = Low), double data rate
(DDRE = High).
Half speed (HSE = High), double data rate (DDRE = High).
Normal data rate (DDRE = Low).
Double data rate (DDRE = High).
4
5
6
7
Table 6-12. Recovered Clock Specification
Symbol
Characteristic
Min
Max
Unit
Trck
RECV_n_RCLK normal cycle period
1
1
Measured between 50-50% points, 125 MHz REF_CLK, full speed (HSE = Low), normal data rate
(DDRE = Low).
Measured between 10-90% points.
8.0
-
ns
Tsrck
RECV_n_RCLK short cycle period
1
6.4
-
ns
Tlrck
RECV_n_RCLK long cycle period
1
9.6
-
ns
Tr
RECV_n_RCLK rise time
2
2
-
1.8
ns
Tf
RECV_n_RCLK fall time
2
-
1.8
ns
RECV_n_RCLK
T
lrck
T
rck
T
srck
T
f
, T
r
XLINK_n_P
XLINK_n_N
T
f
, T
r
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