參數(shù)資料
型號: MC92600
廠商: Motorola, Inc.
英文描述: High-speed, Full-duplex, Serial Data Interface(高速全雙工串行數(shù)據(jù)接口)
中文描述: 高速,全雙工,串行數(shù)據(jù)接口(高速全雙工串行數(shù)據(jù)接口)
文件頁數(shù): 65/82頁
文件大?。?/td> 1056K
代理商: MC92600
Chapter 6. Electrical SpeciTcations and Characteristics
6-19
Package Option Thermal Characteristics
6.3 Package Option Thermal Characteristics
Thermal values for the 196 FBGA and 217 PBGA are listed below in Table 6-15. The
values listed below assume the customer will be mounting these packages on a thermally
enhanced mother board. This is deTned as a minimum 4-layer board with one ground
plane. The values listed below were measured in accordance with established JEDEC (Joint
Electron Device Engineering Council) standards.
6.4 WarpLink Quad Chip Pinout Listing
The WarpLink Quad is offered in two packages, a 196 FBGA and a 217 PBGA.
Table 6-15. WarpLink Package Option Thermal Resistance Values
Symbol
Description
196
FBGA
217
PBGA
Units
q
ja-0
Thermal resistance from junction to ambient, still air
42.5
29.4
q
ja-2
Thermal resistance from junction to ambient, 200 LFM
1
1
Linear feet per minute
37.1
25.1
q
ja-4
Thermal resistance from junction to ambient, 400 LFM
1
36
23.6
Table 6-16. WarpLink Quad Chip Pinout List
Signal Name
Description
Ball Number
(196 FBGA)
Ball Number
(217 PBGA)
Direction
I/O Type
XMIT_A_0
Transmitter A, data bit 0
L8
U8
Input
TTL
XMIT_A_1
Transmitter A, data bit 1
M8
U10
Input
TTL
XMIT_A_2
Transmitter A, data bit 2
P8
T10
Input
TTL
XMIT_A_3
Transmitter A, data bit 3
N8
R10
Input
TTL
XMIT_A_4
Transmitter A, data bit 4
L9
U11
Input
TTL
XMIT_A_5
Transmitter A, data bit 5
P9
T11
Input
TTL
XMIT_A_6
Transmitter A, data bit 6
N9
R11
Input
TTL
XMIT_A_7
Transmitter A, data bit 7
P10
T12
Input
TTL
XMIT_A_K
Transmitter A, special character
(data bit 8 for TBI mode)
N10
T13
Input
TTL
XMIT_A_IDLE_B
Transmitter A, idle enable bar,
(data bit 9 for TBI mode)
P11
T14
Input
TTL
RECV_A_0
Receiver A, data bit 0
M1
N3
Output
TTL
RECV_A_1
Receiver A, data bit 1
N1
R1
Output
TTL
C W
o
C W
¤
o
C W
o
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