參數(shù)資料
型號(hào): MCZ33989EG
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
元件分類(lèi): CAN
英文描述: System Basis Chip with High-Speed CAN Transceiver
中文描述: 系統(tǒng)基礎(chǔ)芯片高高速CAN收發(fā)器
文件頁(yè)數(shù): 42/66頁(yè)
文件大?。?/td> 1181K
代理商: MCZ33989EG
Analog Integrated Circuit Device Data
Freescale Semiconductor
42
33989
TYPICAL APPLICATIONS
SUPPLEMENTAL APPLICATION NOTES
Power Up and V
DD1
Going Low with Sleep Mode as
Default Low Power Mode Selected
The first part of the graph is the same as the previous
figure. If V
DD1
is pulled below the V
DD1
under voltage reset
(typ 4.6 V) for instance by an over current or short circuit (ex
short to 4 V), and if the low power mode previously selected
was sleep mode and if the BATFAIL flag has been cleared,
the SBC enters reset mode for a time period of 100 ms. The
pin WD stays high, but the high level (V
OH
) follows the V
DD1
level.The reset and interrupt pins are low. After the 100 ms,
the SBC goes into sleep mode. V
DD1
and V2 are off (The
following figure is an example where V
DD1
is shorted to 4 V,
and after 100 ms the SBC enters sleep mode.
Figure 25. Power up and V
DD1
Going Low with Sleep Mode as Default Low Power Mode Selected
WAKE-UP TIMINGS — SLEEP MODE
The paragraphs below describe the wake-up events from
sleep mode, and the sequence of the signals at the SBC
level. The wake-up time described is the time from the wake-
up event to the SBC reset pin release. The wake-up time is
the sum of several timings: wake-up signal detection, V
DD1
regulator start-up and decoupling capacitor charge, and reset
time. At the end of the reset time, the reset pin goes from low
to high and the MCU is ready to start software operations.
LX Wakes up SBC from Sleep Mode
Below is the case where the SBC is in sleep mode and is
awaked by LX positive edge.
Figure 26.
T1 (LX high level to V
DD1
turn on): typ 100 μs.
T2: V
DD1
rising time is dependent on the capacitor and
the load connected to V
DD1
. It can be approximated by
the capacitor charging time with the regulator output
current limitation: T2 = (C x U)/I. With C = 100 mF,
I
DD1
= 200 mA min., U = 5 V so T2 = 2.5 ms).
T3 (VDD1>RST-TH (4.6 V by default) to reset high):
parameter Rest dur: 4 ms max.
The total time is 6.6 ms in this example.
CAN Wake-Up
The following case describes the signal for CAN wake up.
Refer to page
49
for more details on CAN wake up signals
and the TCAN analysis.
SBC in Reset
mode
(BATFAIL flag
must be cleared)
SBC in Sleep mode
100 ms
SBC in Normal request
mode
SBC in Normal
mode
SBC in
RESET
mode
350 ms
VDD1
SPI (CS)
INT
WD
RST
Reset every 350 ms
Write Watchdog
each X ms
No problem on
Watchdog period
LX
VDD1
RST
t1
t3
t2
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MCZ33989EG 制造商:Freescale Semiconductor 功能描述:IC SYSTEM BASIS W/CAN TRANCEIVER
MCZ33989EGR2 功能描述:網(wǎng)絡(luò)控制器與處理器 IC SBC-HS RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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MCZ33990EF 制造商:Freescale Semiconductor 功能描述:TRANCEIVER J-1850 CLASS B 8SOIC
MCZ33990EF/R2 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:Enhanced Class B Serial Transceiver