參數(shù)資料
型號： MCZ33989EG
廠商： 飛思卡爾半導(dǎo)體(中國)有限公司
元件分類： CAN
英文描述： System Basis Chip with High-Speed CAN Transceiver
中文描述： 系統(tǒng)基礎(chǔ)芯片高高速CAN收發(fā)器
文件頁數(shù)： 51/66頁
文件大?。?/td> 1181K
代理商： MCZ33989EG
Analog Integrated Circuit Device Data
Freescale Semiconductor
51
33989
TYPICAL APPLICATIONS
SUPPLEMENTAL APPLICATION NOTES
Analysis: CAN Frame with 11 Bits of Identifier Field at 1
Figure 42
is the calculation for the TCAN time with only “1”
in the identifier field.
Figure 42. CAN Frame with 11 Bits of Identifier Field at 1
Analysis: CAN Frame with 11 Bits of Identifier Field at 0
Figure 43
is the calculation for the TCAN time with only “0”
in the identifier field.
Figure 43. CAN Frame with 11 Bits of Identifier Field at 0
FAILURE ON V2 SUPPLY, CAN BUS LINES AND TX
PIN
V2LOW
In order to have proper operation of the CAN interface, V2
must be ON. Two case can be considered:
V2 is connected with an external ballast: in case of a V2
over load condition, the flag V2LOW is set in to the SBC
IOR register. This flag is set when V2 is below the 4 V
typical. An interrupt can also be triggered upon a
V2LOW event. When V2 is low, the CAN interface
cannot operate.
V2 is connected to V1 (no ballast transistor used): V2
will be supplied by the V1 voltage. In case V1 is in an
undervoltage condition (ex V1 below the V1 under
voltage reset, typ 4.6 V), the device will enter the reset
mode. The V2LOW flag will also be set. In this case, the
reset pin is active, and the MCU will not send or receive
any CAN messages.
TX Permanent Dominant
A TX permanent dominant condition is detected by the
CAN interface and leads to a disable of the CAN driver. The
TX permanent dominant is detected if TX stays in dominant
(TX low) from more than 360
μ
s typical. The driver is
automatically re-enabled when TX goes to a high level again.
When a TX permanent dominant is detected, a bit is set into
the SPI register, (bit D2 named TXF in the CAN register). This
bit is latched. In order to clear the bit, two conditions are
necessary:
No longer “TX permanent failure” AND
CAN register read operation.
An interrupt can be enabled.The GFAIL flag in the MCR
register will also be set.
SOF
5 recessive bits
Stuff bit
TCAN
5 recessive bits
Stuff bit
1 recessive bit
13 bits are needed to wake-up the SBC.
If the minimum baud rate is used (60 KBaud), TCAN = 16.7
μ
s*13= 217.1
μ
s
If 250 KBaud is used: TCAN = 4
μ
s *13= 52
μ
s
SBC wakes up
SOF
4 dominant bits
Stuff bit
5 dominant bits
Stuff bit
17 bits are needed to wake-up the SBC.
If the minimum baud rate is used (60 KBaud), TACN = 16.7
μ
s*17= 284
μ
s
If 250 KBaud is used, TCAN = 4
μ
s *17= 68
μ
s.
2 dominant bits
3 dominant bit if RTR IDE & DLC=0
SBC wakes up
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MCZ33989EG 制造商:Freescale Semiconductor 功能描述:IC SYSTEM BASIS W/CAN TRANCEIVER
MCZ33989EGR2 功能描述:網(wǎng)絡(luò)控制器與處理器 IC SBC-HS RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
MCZ33990EF 功能描述:網(wǎng)絡(luò)控制器與處理器 IC CLASS B SERIAL TRANS. RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
MCZ33990EF 制造商:Freescale Semiconductor 功能描述:TRANCEIVER J-1850 CLASS B 8SOIC
MCZ33990EF/R2 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Enhanced Class B Serial Transceiver
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