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11028E–ATARM–22-Apr-13

Figure 44-5. Audio Transfer (PCM L Front, PCM R Front) on Channel x

The TXEMPTY flag in the AC97 Controller Channel x Status Register (AC97C_CxSR) is set

when all requested transmissions for a channel have been shifted on the AC-link. The applica-

tion can either poll TXEMPTY flag in AC97C_CxSR or wait for an interrupt notice associated

with the same flag.

In most cases, the AC97 Controller is embedded in chips that target audio player devices. In

such cases, the AC97 Controller is exposed to heavy audio transfers. Using the polling tech-

nique increases processor overhead and may fail to keep the required pace under an operating

system. In order to avoid these polling drawbacks, the application can perform audio streams by

using PDC connected to channel A, which reduces processor overhead and increases perfor-

mance especially under an operating system.

The PDC transmit counter values must be equal to the number of PCM samples to be transmit-

ted, each sample goes in one slot.

AC97 Output Frame

The AC97 Controller outputs a thirteen-slot frame on the AC-Link. The first slot (tag slot or slot 0)

flags the validity of the entire frame and the validity of each slot; whether a slot carries valid data

or not. Slots 1 and 2 are used if the application performs control and status monitoring actions

on AC97 Codec control/status registers. Slots [3:12] are used according to the content of the

AC97 Controller Output Channel Assignment Register (AC97C_OCA). If the application per-

forms many transmit requests on a channel, some of the slots associated to this channel or all of

them will carry valid data.

Receive Operation

The AC97 Controller can also receive data from AC97 Codec. Data is received in the channel’s

shift register and then transferred to the AC97 Controller Channel x Read Holding Register. To

read the newly received data, the application must perform the following steps:

Poll RXRDY flag in AC97 Controller Channel x Status Register (AC97C_CxSR). x being one

of the 2 channels.

Read data from AC97 Controller Channel x Read Holding Register.

(Controller Output)

Write access to

transfered to the shift register

transfered to the shift register

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相關代理商/技術參數(shù)	參數(shù)描述
MD80C51	制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:CMOS 0 to 44 MHz Single-Chip 8 Bit Microcontroller
MD80C51BH	制造商:ROCHESTER 制造商全稱:ROCHESTER 功能描述:CMOS SINGLE - CHIP 8-BIT MICROCOMPUTER 64K program Memory Space
MD80C51FB	制造商:Rochester Electronics LLC 功能描述:
MD80C86	制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS 16-Bit Microprocessor
MD80C862	制造商:Intel 功能描述:PROCESSOR:MICRO-PROCESSOR

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