參數(shù)資料
型號: MH28D72KLG-75
廠商: Mitsubishi Electric Corporation
英文描述: 9,663,676,416-BIT (134,217,728-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
中文描述: 9663676416位(134217728 - Word的72位),雙數(shù)據(jù)速率同步DRAM模塊
文件頁數(shù): 14/39頁
文件大?。?/td> 337K
代理商: MH28D72KLG-75
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
MH28D72KLG-75,-10
9,663,676,416-BIT (134,217,728-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
MIT-DS-0412-0.1
21.Mar.2001
Preliminary Spec.
Some contents are subject to change without notice.
14
EXTENDED MODE REGISTER
DLL disable / enable mode can be programmed by setting the extended
mode register (EMRS). The extended mode register stores these data
until the next EMRS command, which may be issued in idle state.
After tMRD from a EMRS command, the DDR DIMM is ready for new
command.
/S0
/RAS
/CAS
/WE
A11-A0
/CK0
V
CK0
BA0
BA1
0
1
DLL
Disable
DLL enable
DLL disable
A11 A10 A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
BA1 BA0
0
0
0
0
DD
1
0
0
DS
QFC
0
0
0
0
0
1
Drive
Strength
Normal
Weak
0
1
QFC
Disable
Enable
A12
0
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