參數(shù)資料
型號(hào): MH28D72KLG-75
廠商: Mitsubishi Electric Corporation
英文描述: 9,663,676,416-BIT (134,217,728-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
中文描述: 9663676416位(134217728 - Word的72位),雙數(shù)據(jù)速率同步DRAM模塊
文件頁(yè)數(shù): 29/39頁(yè)
文件大?。?/td> 337K
代理商: MH28D72KLG-75
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
MH28D72KLG-75,-10
9,663,676,416-BIT (134,217,728-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
MIT-DS-0412-0.1
21.Mar.2001
Preliminary Spec.
Some contents are subject to change without notice.
29
[Read Interrupted by Write with TERM]
Read Interrupted by TERM (BL=8)
CL=2.5
Command
DQ
Q0
Q1
Q2
Q3
/CLK
CLK
READ
TERM
DQS
WRITE
D0
D1
D2
D3
CL=2.0
Command
DQ
Q0
Q1
Q2
Q3
READ
TERM
DQS
WRITE
D0
D1
D2
D3
D4
D5
Module input and output timing.
Discrete
CL=3.5
Module
Discrete
CL=3.0
Module
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