參數(shù)資料
型號(hào)： MH28D72KLG-75
廠商： Mitsubishi Electric Corporation
英文描述： 9,663,676,416-BIT (134,217,728-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
中文描述： 9663676416位（134217728 - Word的72位），雙數(shù)據(jù)速率同步DRAM模塊
文件頁數(shù)： 7/39頁
文件大?。?/td> 337K
代理商： MH28D72KLG-75
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
MH28D72KLG-75,-10
9,663,676,416-BIT (134,217,728-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
MIT-DS-0412-0.1
21.Mar.2001
Preliminary Spec.
Some contents are subject to change without notice.
7
FUNCTION TRUTH TABLE
/S
Current State
/RAS /CAS
/WE
Address
Command
Action
IDLE
H
X
X
X
X
DESEL
NOP
L
H
H
H
X
NOP
NOP
L
H
H
L
BA
TERM
ILLEGAL
L
H
L
X
BA, CA, A10
READ / WRITE ILLEGAL
L
L
H
H
BA, RA
ACT
Bank Active, Latch RA
L
L
H
L
BA, A10
PRE / PREA
NOP
L
L
L
H
X
REFA
Auto-Refresh
L
L
L
L
Op-Code,
Mode-Add
MRS
Mode Register Set
ROW ACTIVE
H
X
X
X
X
DESEL
NOP
L
H
H
H
X
NOP
NOP
L
H
H
L
BA
TERM
NOP
L
H
L
H
BA, CA, A10
READ / READA
Begin Read, Latch CA,
Determine Auto-Precharge
L
H
L
L
BA, CA, A10
WRITE /
WRITEA
Begin Write, Latch CA,
Determine Auto-Precharge
L
L
H
H
BA, RA
ACT
Bank Active / ILLEGAL
L
L
H
L
BA, A10
PRE / PREA
Precharge / Precharge All
L
L
L
H
X
REFA
ILLEGAL
L
L
L
L
Op-Code,
Mode-Add
MRS
ILLEGAL
READ
(Auto-
Precharge
Disabled)
H
X
X
X
X
DESEL
NOP (Continue Burst to END)
L
H
H
H
X
NOP
NOP (Continue Burst to END)
L
H
H
L
BA
TERM
Terminate Burst
L
H
L
H
BA, CA, A10
READ / READA
Terminate Burst, Latch CA,
Begin New Read, Determine
Auto-Precharge
L
H
L
L
BA, CA, A10
WRITE
WRITEA
L
L
H
H
BA, RA
ACT
Bank Active / ILLEGAL
L
L
H
L
BA, A10
PRE / PREA
Terminate Burst, Precharge
L
L
L
H
X
REFA
ILLEGAL
L
L
L
L
Op-Code,
Mode-Add
MRS
ILLEGAL
Notes
2
2
2
4
5
5
3
2
ILLEGAL
相關(guān)PDF資料
PDF描述
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