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參數(shù)資料
| 型號： | MH28D72KLG-75 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 9,663,676,416-BIT (134,217,728-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module |
| 中文描述： | 9663676416位（134217728 - Word的72位），雙數(shù)據(jù)速率同步DRAM模塊 |
| 文件頁數(shù)： | 9/39頁 |
| 文件大?。?/td> | 337K |
| 代理商： | MH28D72KLG-75 |
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MITSUBISHI LSIs
MITSUBISHI ELECTRIC
MH28D72KLG-75,-10
9,663,676,416-BIT (134,217,728-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
MIT-DS-0412-0.1
21.Mar.2001
Preliminary Spec.
Some contents are subject to change without notice.
9
FUNCTION TRUTH TABLE (continued)
Current State
/S
/RAS /CAS
/WE
Address
Command
Action
PRE -
CHARGING
H
X
X
X
X
DESEL
NOP (Idle after tRP)
L
H
H
H
X
NOP
NOP (Idle after tRP)
L
H
H
L
BA
TERM
ILLEGAL
L
H
L
X
BA, CA, A10
READ / WRITE ILLEGAL
L
L
H
H
BA, RA
ACT
ILLEGAL
L
L
H
L
BA, A10
PRE / PREA
NOP (Idle after tRP)
L
L
L
H
X
REFA
ILLEGAL
L
L
L
L
Op-Code,
Mode-Add
MRS
ILLEGAL
ROW
ACTIVATING
H
X
X
X
X
DESEL
NOP (Row Active after tRCD)
L
H
H
H
X
NOP
NOP (Row Active after tRCD)
L
H
H
L
BA
TERM
ILLEGAL
L
H
L
X
BA, CA, A10
READ / WRITE ILLEGAL
L
L
H
H
BA, RA
ACT
ILLEGAL
L
L
H
L
BA, A10
PRE / PREA
ILLEGAL
L
L
L
H
X
REFA
ILLEGAL
L
L
L
L
Op-Code,
Mode-Add
MRS
ILLEGAL
WRITE RE-
COVERING
H
X
X
X
X
DESEL
NOP
L
H
H
H
X
NOP
NOP
L
H
H
L
BA
TERM
ILLEGAL
L
H
L
X
BA, CA, A10
READ / WRITE ILLEGAL
L
L
H
H
BA, RA
ACT
ILLEGAL
L
L
H
L
BA, A10
PRE / PREA
ILLEGAL
L
L
L
H
X
REFA
ILLEGAL
L
L
L
L
Op-Code,
Mode-Add
MRS
ILLEGAL
Notes
2
2
2
4
2
2
2
2
2
2
2
2
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