- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄4044 > MPC755CVT400LE (Freescale Semiconductor)MCU HIP4DP 400MHZ 360-PBGA PDF資料下載
參數(shù)資料
| 型號： | MPC755CVT400LE |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 33/56頁 |
| 文件大?。?/td> | 0K |
| 描述： | MCU HIP4DP 400MHZ 360-PBGA |
| 標準包裝： | 44 |
| 系列： | MPC7xx |
| 處理器類型： | 32-位 MPC7xx PowerPC |
| 速度： | 400MHz |
| 電壓： | 2V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 360-BBGA，F(xiàn)CCBGA |
| 供應商設備封裝： | 360-FCCBGA（25x25） |
| 包裝： | 托盤 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁當前第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁
MPC755 RISC Microprocessor Hardware Specifications, Rev. 8
Freescale Semiconductor
39
System Design Information
These capacitors should have a value of 0.01 or 0.1 F. Only ceramic SMT (surface mount technology)
capacitors should be used to minimize lead inductance, preferably 0508 or 0603 orientations where
connections are made along the length of the part.
In addition, it is recommended that there be several bulk storage capacitors distributed around the PCB,
feeding the VDD, L2OVDD, and OVDD planes, to enable quick recharging of the smaller chip capacitors.
These bulk capacitors should have a low ESR (equivalent series resistance) rating to ensure the quick
response time necessary. They should also be connected to the power and ground planes through two vias
to minimize inductance. Suggested bulk capacitors:100–330 F (AVX TPS tantalum or Sanyo OSCON).
8.4
Connection Recommendations
To ensure reliable operation, it is highly recommended to connect unused inputs to an appropriate signal
level through a resistor. Unused active low inputs should be tied to OVDD. Unused active high inputs
should be connected to GND. All NC (no connect) signals must remain unconnected.
Power and ground connections must be made to all external VDD, OVDD, L2OVDD, and GND pins of the
MPC755. Note that power must be supplied to L2OVDD even if the L2 interface of the MPC755 will not
be used; it is recommended to connect L2OVDD to OVDD and L2VSEL to BVSEL if the L2 interface is
unused. (This requirement does not apply to the MPC745 since it has neither an L2 interface nor L2OVDD
pins.)
8.5
Output Buffer DC Impedance
The MPC755 60x and L2 I/O drivers are characterized over process, voltage, and temperature. To measure
Z0, an external resistor is connected from the chip pad to (L2)OVDD or GND. Then, the value of each
The output impedance is the average of two components, the resistances of the pull-up and pull-down
devices. When data is held low, SW2 is closed (SW1 is open), and RN is trimmed until the voltage at the
pad equals (L2)OVDD/2. RN then becomes the resistance of the pull-down devices. When data is held high,
SW1 is closed (SW2 is open), and RP is trimmed until the voltage at the pad equals (L2)OVDD/2. RP then
becomes the resistance of the pull-up devices.
相關PDF資料 |
PDF描述 |
|---|---|
| MPC8544VTALFA | IC MPU POWERQUICC III 783-FCBGA |
| IDT70V25S55PF | IC SRAM 128KBIT 55NS 100TQFP |
| MPC8270CVVUPEA | IC MPU POWERQUICC II 480-TBGA |
| XF3H-2555-31A | CONN FPC 25POS 0.3MM PITCH SMD |
| MC68360RC25L | IC MPU QUICC 25MHZ 241-PGA |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MPC76 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Metal Plate Cement Resistors |
| MPC76-0.05HK | 制造商:FUKUSHIMA 功能描述: |
| MPC76-103J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Metal Plate Cement Resistors |
| MPC76-103K | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Metal Plate Cement Resistors |
| MPC78 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Metal Plate Cement Resistors |
發(fā)布緊急采購，3分鐘左右您將得到回復。