參數(shù)資料
型號： MPC8569CVTANKGA
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： RISC PROCESSOR, PBGA783
封裝： 29 X 29 MM, 1 MM PITCH, PLASTIC, BGA-783
文件頁數(shù)： 107/126頁
文件大?。?/td> 2847K
代理商： MPC8569CVTANKGA
High-Speed SerDes Interfaces (HSSI)
MPC8569E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 0
Freescale Semiconductor
81
— For external DC-coupled connection, as described in Section 2.9.2.2, “SerDes Reference Clock Receiver
Characteristics,” the maximum average current requirements sets the requirement for average voltage (common
mode voltage) to be between 100 and 400 mV. The following figure shows the SerDes reference clock input
requirement for DC-coupled connection scheme.
Figure 40. Differential Reference Clock Input DC Requirements (External DC-Coupled)
— For external AC-coupled connection, there is no common mode voltage requirement for the clock driver. Since the
external AC-coupling capacitor blocks the DC level, the clock driver and the SerDes reference clock receiver
operate in different command mode voltages. The SerDes reference clock receiver in this connection scheme has
its common mode voltage set to SCOREGND. Each signal wire of the differential inputs is allowed to swing below
and above the command mode voltage (SCOREGND). The following figure shows the SerDes reference clock
input requirement for AC-coupled connection scheme.
Figure 41. Differential Reference Clock Input DC Requirements (External AC-Coupled)
Single-ended mode
— The reference clock can also be single-ended. The SD_REF_CLK input amplitude (single-ended swing) must be
between 400 and 800 mV peak-peak (from Vmin to Vmax) with SD_REF_CLK either left unconnected or tied to
ground.
— The SD_REF_CLK input average voltage must be between 200 and 400 mV. Figure 42 shows the SerDes
reference clock input requirement for single-ended signaling mode.
— To meet the input amplitude requirement, the reference clock inputs might need to be DC- or AC-coupled
externally. For the best noise performance, the reference of the clock could be DC- or AC-coupled into the unused
phase (SD_REF_CLK) through the same source impedance as the clock input (SD_REF_CLK) in use.
SD_REF_CLK
Vmax < 800 mV
Vmin > 0V
100 mV < Vcm < 400 mV
200 mV < Input Amplitude or Differential Peak < 800 mV
SD_REF_CLK
Vcm
200 mV < Input Amplitude or Differential Peak < 800 mV
Vmax
< Vcm + 400 mV
Vmin
> Vcm – 400 mV
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相關(guān)代理商/技術(shù)參數(shù)
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MPC8569CVTANKGB 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 8569 XT 800/600/400 r2.1 RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MPC8569CVTAQLJB 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 8569 XT 1067/667/533 r2.1 RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MPC8569ECVTANKGB 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 8569E XT 800/600/400 r2.1 RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MPC8569ECVTAQLJB 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 8569E XT1067/667/533 r2.1 RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MPC8569E-MDS-PB 功能描述:開發(fā)板和工具包 - 其他處理器 MPC8569 MDS PROCESSOR BD RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓:
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