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型號(hào)：	MQ80C32-20
廠(chǎng)商：	ATMEL CORP
元件分類(lèi)：	微控制器/微處理器
英文描述：	8-BIT, 20 MHz, MICROCONTROLLER, CQFP44
封裝：	CERAMIC, QFP-44
文件頁(yè)數(shù)：	1026/1185頁(yè)
文件大?。?/td>	5451K
代理商：	MQ80C32-20

SAM9G45 [DATASHEET]

6438K–ATARM–12-Feb-13

UDPHS DMA Channel Status Register

UDPHS_DMASTATUSx [x = 1..5]

Addresses:

0xFFF7832C [1], 0xFFF7833C [2], 0xFFF7834C [3], 0xFFF7835C [4], 0xFFF7836C [5]

Access Type:

CHANN_ENB: Channel Enable Status

0 = If cleared, the DMA channel no longer transfers data, and may load the next descriptor if the UDPHS_DMACONTROLx

When any transfer is ended either due to an elapsed byte count or a UDPHS device initiated transfer end, this bit is auto-

matically reset.

1 = If set, the DMA channel is currently enabled and transfers data upon request.

This bit is normally set or cleared by writing into the UDPHS_DMACONTROLx register CHANN_ENB bit field either by soft-

ware or descriptor loading.

If a channel request is currently serviced when the UDPHS_DMACONTROLx register CHANN_ENB bit is cleared, the

DMA FIFO buffer is drained until it is empty, then this status bit is cleared.

CHANN_ACT: Channel Active Status

0 = The DMA channel is no longer trying to source the packet data.

When a packet transfer is ended this bit is automatically reset.

1 = The DMA channel is currently trying to source packet data, i.e. selected as the highest-priority requesting channel.

When a packet transfer cannot be completed due to an END_BF_ST, this flag stays set during the next channel descriptor

load (if any) and potentially until UDPHS packet transfer completion, if allowed by the new descriptor.

END_TR_ST: End of Channel Transfer Status

0 = Cleared automatically when read by software.

1 = Set by hardware when the last packet transfer is complete, if the UDPHS device has ended the transfer.

Valid until the CHANN_ENB flag is cleared at the end of the next buffer transfer.

END_BF_ST: End of Channel Buffer Status

0 = Cleared automatically when read by software.

1 = Set by hardware when the BUFF_COUNT downcount reach zero.

Valid until the CHANN_ENB flag is cleared at the end of the next buffer transfer.

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相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
MQ82370-20	制造商:Rochester Electronics LLC 功能描述:- Bulk
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MQ82380-20	制造商:Rochester Electronics LLC 功能描述:- Bulk
MQ82380-20/R	制造商:Rochester Electronics LLC 功能描述:
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