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SAM9G45 [DATASHEET]
6438K–ATARM–12-Feb-13
9.8
Tightly-Coupled Memory Interface
9.8.1
TCM Description
The ARM926EJ-S processor features a Tightly-coupled Memory (TCM) interface, which enables separate instruc-
tion and data TCMs (ITCM and DTCM) to be directly reached by the processor. TCMs are used to store real-time
and performance critical code, they also provide a DMA support mechanism. Unlike AHB accesses to external
memories, accesses to TCMs are fast and deterministic and do not incur bus penalties.
The user has the possibility to independently configure each TCM size with values within the following ranges, [0K
Byte, 64K Bytes] for ITCM size and [0K Byte, 64K Bytes] for DTCM size.
TCMs can be configured by two means: HMATRIX TCM register and TCM region register (register 9) in CP15 and
both steps should be performed. HMATRIX TCM register sets TCM size whereas TCM region register (register 9)
in CP15 maps TCMs and enables them.
The data side of the ARM9EJ-S core is able to access the ITCM. This is necessary to enable code to be loaded
into the ITCM, for SWI and emulated instruction handlers, and for accesses to PC-relative literal pools.
9.8.2
Enabling and Disabling TCMs
Prior to any enabling step, the user should configure the TCM sizes in HMATRIX TCM register. Then enabling
TCMs is performed by using TCM region register (register 9) in CP15. The user should use the same sizes as
those put in HMATRIX TCM register. For further details and programming tips, please refer to chapter 2.3 in
ARM926EJ-S TRM.
9.8.3
TCM Mapping
The TCMs can be located anywhere in the memory map, with a single region available for ITCM and a separate
region available for DTCM. The TCMs are physically addressed and can be placed anywhere in physical address
space. However, the base address of a TCM must be aligned to its size, and the DTCM and ITCM regions must not
overlap. TCM mapping is performed by using TCM region register (register 9) in CP15. The user should input the
right mapping address for TCMs.