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型號(hào)：	MQ80C32-20
廠商：	ATMEL CORP
元件分類(lèi)：	微控制器/微處理器
英文描述：	8-BIT, 20 MHz, MICROCONTROLLER, CQFP44
封裝：	CERAMIC, QFP-44
文件頁(yè)數(shù)：	967/1185頁(yè)
文件大小：	5451K
代理商：	MQ80C32-20

SAM9G45 [DATASHEET]

6438K–ATARM–12-Feb-13

High Speed devices must support an improved NAK mechanism for Bulk OUT and control endpoints (except setup

stage). This mechanism allows the device to tell the host whether it has sufficient endpoint space for the next OUT

transfer (see USB 2.0 spec 8.5.1 NAK Limiting via Ping Flow Control).

The NYET/ACK response to a High Speed Bulk OUT transfer and the PING response are automatically handled by

hardware in the UDPHS_EPTCTLx register (except when the user wants to force a NAK response by using the

NYET_DIS bit).

If the endpoint responds instead to the OUT/DATA transaction with an NYET handshake, this means that the end-

point accepted the data but does not have room for another data payload. The host controller must return to using

a PING token until the endpoint indicates it has space available.

Figure 38-7. NYET Example with Two Endpoint Banks

Bulk IN or Interrupt IN

Data IN packets are sent by the device during the data or the status stage of a control transfer or during an (inter-

rupt/bulk/isochronous) IN transfer. Data buffers are sent packet by packet under the control of the application or

under the control of the DMA channel.

There are three ways for an application to transfer a buffer in several packets over the USB:

packet by packet (see 38.5.8.5 below)

64 Kbyte (see 38.5.8.5 below)

DMA (see 38.5.8.6 below)

Bulk IN or Interrupt IN: Sending a Packet Under Application Control (Device to Host)

The application can write one or several banks.

A simple algorithm can be used by the application to send packets regardless of the number of banks associated to

the endpoint.

Algorithm Description for Each Packet:

The application waits for TX_PK_RDY flag to be cleared in the UDPHS_EPTSTAx register before it can perform

a write access to the DPR.

The application writes one USB packet of data in the DPR through the 64 Kbyte endpoint logical memory

The application sets TX_PK_RDY flag in the UDPHS_EPTSETSTAx register.

The application is notified that it is possible to write a new packet to the DPR by the TX_PK_RDY interrupt. This

UDPHS_EPTCTLENB/UDPHS_EPTCTLDIS register.

E': begin to empty

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相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
MQ82370-20	制造商:Rochester Electronics LLC 功能描述:- Bulk
MQ8238020	制造商:Intel 功能描述:CONTROLLER: OTHER
MQ82380-20	制造商:Rochester Electronics LLC 功能描述:- Bulk
MQ82380-20/R	制造商:Rochester Electronics LLC 功能描述:
MQ82592	制造商:Rochester Electronics LLC 功能描述:- Bulk

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