1154
SAM9G45 [DATASHEET]
6438K–ATARM–12-Feb-13
49.2
SAM9G45 Errata - Rev. B Parts
49.2.1
Boot ROM
49.2.1.1
Boot ROM: NAND Flash boot does not support ECC Correction
The boot ROM allows booting from block 0 of a NAND Flash connected on CS3. However, the boot ROM does not
feature ECC correction on a NAND Flash.
Most of the NAND Flash vendors do not guarantee anymore that block 0 is error free. Therefore we advise to
locate the bootstrap program into another device supported by the boot ROM (DataFlash, Serial Flash, SDCARD
or EEPROM), and to implement a NAND Flash access with ECC.
Problem Fix/Workaround
None.
49.2.1.2
Boot ROM: Boot issue on AT45-series SPI dataflash
The boot from AT45-series SPI DataFlash is not functional except for the AT45DB321D. Future revisions of the
AT45DB321D might not be functional either.
Problem Fix/Workaround
Use AT25-series serial Flash instead.
49.2.2
Error Corrected Code Controller (ECC)
49.2.2.1
ECC: Computation with a 1 clock cycle long NRD/NWE pulse
If the SMC is programmed with NRD/NWE pulse length equal to 1 clock cycle, ECC can't compute the parity.
Problem Fix/Workaround
It is recommended to program SMC with a value superior to 1.
49.2.2.2
ECC: Uncomplete parity status when error in ECC parity
When a single correctable error is detected in ECC value, the error is located in ECC Parity register's field which
contains a 1 in the 24 least significant bits, except when the error is located in the 12th or the 24th bit. In this case,
these bits are always stuck at 0.
A Single correctable error is detected but it is impossible to correct it.
Problem Fix/Workaround
None.
49.2.2.3
ECC: Unsupported ECC per 512 words
1 bit ECC per 512 words is not functional.
Problem Fix/Workaround
Perform the ECC computation by software.
49.2.2.4
ECC: Unsupported hardware ECC on 16-bit Nand Flash
Hardware ECC on 16-bit Nand Flash is not supported.
Problem Fix/Workaround
Perform the ECC by software.