- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄19294 > MSC8103VT1100F (Freescale Semiconductor)IC DSP 16BIT 275MHZ 332-FCPBGA PDF資料下載
參數(shù)資料
| 型號： | MSC8103VT1100F |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 13/104頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP 16BIT 275MHZ 332-FCPBGA |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | StarCore |
| 類型： | SC140 內(nèi)核 |
| 接口： | 通信處理器模塊（CPM） |
| 時鐘速率： | 275MHz |
| 非易失內(nèi)存： | 外部 |
| 芯片上RAM： | 512kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 1.60V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 332-BFBGA，F(xiàn)CPBGA |
| 供應(yīng)商設(shè)備封裝： | 332-FCBGA（17x17） |
| 包裝： | 托盤 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁當(dāng)前第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁
MSC8103 Network Digital Signal Processor, Rev. 12
1-12
Freescale Semiconductor
Signals/Connections
IRQ5
DP5
DREQ4
EXT_DBG3
Input
Input/Output
Input
Output
Interrupt Request 51
One of eight external lines that can request a service routine, via the internal interrupt controller,
from the SC140 core.
Data Parity 51
The agent that drives the data bus also drives the data parity signals. The value driven on the data
parity five pin should give odd parity (odd number of ones) on the group of signals that includes data
parity 5 and D[40–47].
DMA Request 41
An external peripheral uses this pin to request DMA service.
External Data Bus Grant 31,2
The MSC8103 asserts this pin to grant data bus ownership to an external bus master.
IRQ6
DP6
DACK3
Input
Input/Output
Output
Interrupt Request 61
One of eight external lines that can request a service routine, via the internal interrupt controller,
from the SC140 core.
Data Parity 61
The agent that drives the data bus also drives the data parity signals. The value driven on the data
parity six pin should give odd parity (odd number of ones) on the group of signals that includes data
parity 6 and D[48–55].
DMA Acknowledge 31
The DMA controller drives this output to acknowledge the DMA transaction on the bus.
IRQ7
DP7
DACK4
Input
Input/Output
Output
Interrupt Request 71
One of eight external lines that can request a service routine, via the internal interrupt controller,
from the SC140 core.
Data Parity 71
The master or slave that drives the data bus also drives the data parity signals. The value driven on
the data parity seven pin should give odd parity (odd number of ones) on the group of signals that
includes data parity 7 and D[56–63].
DMA Acknowledge1
The DMA controller drives this output to acknowledge the DMA transaction on the bus.
TA
Input/Output
Transfer Acknowledge
Indicates that a data beat is valid on the data bus. For single beat transfers, assertion of TA
indicates the termination of the transfer. For burst transfers, TA is asserted four times to indicate the
transfer of four data beats with the last assertion indicating the termination of the burst transfer.
TEA
Input/Output
Transfer Error Acknowledge
Indicates a bus error. masters within the MSC8103 monitor the state of this pin. The MSC8103
internal bus monitor can assert this pin if it identifies a bus transfer that is hung.
NMI
Input
Non-Maskable Interrupt
When an external device asserts this line, the MSC8103 NMI input is asserted.
NMI_OUT
Output
Non-Maskable Interrupt
Driven from the MSC8103 internal interrupt controller. Assertion of this output indicates that a
non-maskable interrupt, pending in the MSC8103 internal interrupt controller, is waiting to be
handled by an external host.
PSDVAL
Input/Output
Data Valid
Indicates that a data beat is valid on the data bus. The difference between the TA pin and PSDVAL
is that the TA pin is asserted to indicate data transfer terminations while the PSDVAL signal is
asserted with each data beat movement. Thus, when TA is asserted, PSDVAL is asserted, but when
PSDVAL is asserted, TA is not necessarily asserted. For example when the SDMA initiates a double
word (2x64 bits) transfer to a memory device that has a 32-bit port size, PSDVAL is asserted three
times without TA, and finally both pins are asserted to terminate the transfer.
Table 1-5.
System Bus, HDI16, and Interrupt Signals (Continued)
Signal
Data Flow
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| RBB10DHRD | CONN CARD EXTEND 20POS .050" |
| VE-253-CW-F1 | CONVERTER MOD DC/DC 24V 100W |
| EEC18DRXS | CONN EDGECARD 36POS DIP .100 SLD |
| VE-25N-CW-F1 | CONVERTER MOD DC/DC 18.5V 100W |
| EMM44DSXS | CONN EDGECARD 88POS DIP .156 SLD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MSC8103VT1200F | 功能描述:IC DSP 16BIT 300MHZ 332-FCPBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:StarCore 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| MSC81058 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:RF & MICROWAVE TRANSISTORS GENERAL PURPOSE AMPLIFIER APPLICATIONS |
| MSC81090 | 制造商:ASI 制造商全稱:ASI 功能描述:NPN SILICON RF POWER TRANSISTOR |
| MSC81111 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:RF & MICROWAVE TRANSISTORS GENERAL PURPOSE AMPLIFIER APPLICATIONS |
| MSC81118 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:RF & MICROWAVE TRANSISTORS GENERAL PURPOSE AMPLIFIER APPLICATIONS |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。