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參數(shù)資料
| 型號： | MSC8256TVT800B |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 0-BIT, OTHER DSP, PBGA783 |
| 封裝： | 29 X 29 MM, LEAD FREE, PLASTIC, FCBGA-783 |
| 文件頁數(shù)： | 28/68頁 |
| 文件大?。?/td> | 910K |
| 代理商： | MSC8256TVT800B |
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MSC8256 Six-Core Digital Signal Processor Data Sheet, Rev. 3
Electrical Characteristics
Freescale Semiconductor
34
Table 16 describes the SGMII SerDes receiver AC-coupled DC electrical characteristics.
Figure 10. SGMII Transmitter DC Measurement Circuit
Table 16. SGMII DC Receiver Electrical Characteristics5
Parameter
Symbol
Min
Typ
Max
Unit
Notes
DC Input voltage range
—
N/A
—
1
Input
differential
voltage
SRDSnCR4[EICE{12:10}] = 0b001 for SGMII1
SRDSnCR4[EICF{4:2}] = 0b001 for SGMII2
VRX_DIFFp-p
100
—
1200
mV
2, 4
SRDSnCR4[EICE{12:10}] = 0b100 for SGMII1
SRDSnCR4[EICF{4:2}] = 0b100 for SGMII2
175
—
Loss of
signal
threshold
SRDSnCR4[EICE{12:10}] = 0b001 for SGMII1
SRDSnCR4[EICF{4:2}] = 0b001 for SGMII2
VLOS
30
—
100
mV
3, 4
SRDSnCR4[EICE{12:10}] = 0b100 for SGMII1
SRDSnCR4[EICF{4:2}] = 0b100 for SGMII2
65
—
175
Receiver differential input impedance
ZRX_DIFF
80
—
120
W
—
Notes:
1.
Input must be externally AC-coupled.
2.
VRX_DIFFp-p is also referred to as peak-to-peak input differential voltage.
3.
The concept of this parameter is equivalent to the Electrical Idle Detect Threshold parameter in the PCI Express interface.
Refer to the PCI Express Differential Receiver (RX) Input Specifications section of the PCI Express Specification document.
for details.
4.
The values for SGMII1 and SGMII2 are selected in the SRDS control registers.
5.
The supply voltage is 1.0 V.
50
Ω
Transmitter
SR[1–2]_TXn
50
Ω
Vos
VOD
SGMII SerDes
Interface
50
Ω
50
Ω
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