參數(shù)資料
型號: MSC8256TVT800B
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 數(shù)字信號處理
英文描述: 0-BIT, OTHER DSP, PBGA783
封裝: 29 X 29 MM, LEAD FREE, PLASTIC, FCBGA-783
文件頁數(shù): 51/68頁
文件大?。?/td> 910K
代理商: MSC8256TVT800B
Hardware Design Considerations
MSC8256 Six-Core Digital Signal Processor Data Sheet, Rev. 3
Freescale Semiconductor
55
Notes: 1.
If the M3 memory is not used, M3VDD can be tied to GND.
2.
If the HSSI port1 is not used, SXCVDD1and SXPVDD1 must be connected to the designated power supplies.
3.
If the HSSI port2 is not used, SXCVDD2 and SXPVDD2 must be connected to the designated power supplies.
4.
If the DDR port 1 interface is not used, it is recommended that GVDD1 be left unconnected.
5.
If the DDR port 2 interface is not used, it is recommended that GVDD2 be left unconnected.
3.1.4
Reset Guidelines
When a debugger is not used, implement the connection scheme shown in Figure 35.
When a debugger is used, implement the connection scheme shown in Figure 36.
Figure 35. Reset Connection in Functional Application
Figure 36. Reset Connection in Debugger Application
On-board PORESET source
TRST
PORESET
MSC815x
(example: voltage monitor)
10
ΚΩ
On-board PORESET source
TRST
PORESET
MSC815x
(example: voltage monitor)
On-board TRST source
(example: OnCE)
VDDIO
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