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參數(shù)資料
| 型號(hào)： | MT312 |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Satellite Channel Decoder |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP80 |
| 封裝： | MQFP-80 |
| 文件頁(yè)數(shù)： | 22/90頁(yè) |
| 文件大?。?/td> | 318K |
| 代理商： | MT312 |
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MT312
Initialisation
22
3.5.2 MT312 Configuration. Register 127 (R/W)
CONFIG[7:0]: This register is for setting up the MT312. It must be loaded
fi
rst before any other register. It can
only be reset by the RESET pin being pulled low.
B7:
312 EN
High = MT312 enable.
Low = MT312 disable to save power.
B6-5:
DSS B
0
0
1
1
DSS A
0:
1:
0:
1:
DVB mode
DSS mode 1 - code rate 2/3
DSS mode 2 - code rate 6/7
DSS search mode
If both DSS A and DSS B are set high, the MT312 will search for the code rate in DSS mode. Then
the Symbol rate is automatically set to 20Mbaud and SYM RATE registers (23 & 24) are ignored.
Also, any code rate programmed into VIT MODE register (25) and VIT SETUP register (86) will be
ignored.
Also in DSS mode TS SW RATE register (50) must be set to 20, see page 70.
B4:
BPSK
High = BPSK
Low = QPSK
B3-2:
PLL FACTOR[1:0]:
B3-2
00:
01:
10:
11:
Multiplication factor
3
4
6
9
B1:
CRYS15
High = 15MHz crystal.
Low = 10MHz crystal.
B0:
ADCEXT
High = ADC external.
Low = ADC internal.
e.g.
For a crystal frequency of 10MHz, a system clock frequency of 60MHz, the PLL ratio will be 6,
requiring the PLL FACTOR[1:0] = 2.
When MT312 is not being used it can be put into power save mode by setting bit B7 to 0.
NAME
ADR
B7
B6
B5
B4
B3
B2
B1
B0
Def
hex
CONFIG
127
312 EN
DSS B
DSS A
BPSK
PLL FACTOR
[1:0]
CRYS
15
ADC
EXT
R/W
08
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| MT3-1203SI | 制造商:VOLGEN 制造商全稱:VOLGEN 功能描述:3 WATT DC/DC CONVERTER, SIINGLE & MULTIIPLE OUTPUTS |
| MT3-1205SI | 制造商:VOLGEN 制造商全稱:VOLGEN 功能描述:3 WATT DC/DC CONVERTER, SIINGLE & MULTIIPLE OUTPUTS |
| MT3-1212SI | 制造商:VOLGEN 制造商全稱:VOLGEN 功能描述:3 WATT DC/DC CONVERTER, SIINGLE & MULTIIPLE OUTPUTS |
| MT3-1212WI | 制造商:VOLGEN 制造商全稱:VOLGEN 功能描述:3 WATT DC/DC CONVERTER, SIINGLE & MULTIIPLE OUTPUTS |
| MT3-1215WI | 制造商:VOLGEN 制造商全稱:VOLGEN 功能描述:3 WATT DC/DC CONVERTER, SIINGLE & MULTIIPLE OUTPUTS |
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