參數(shù)資料
型號(hào): MT55L256L32FT-12
元件分類: SRAM
英文描述: 256K X 32 ZBT SRAM, 9 ns, PQFP100
封裝: PLASTIC, TQFP-100
文件頁(yè)數(shù): 4/25頁(yè)
文件大?。?/td> 300K
代理商: MT55L256L32FT-12
12
8Mb: 512K x 18, 256K x 32/36 Flow-Through ZBT SRAM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT55L512L18F_C.p65 – Rev. 2/02
2002, Micron Technology, Inc.
8Mb: 512K x 18, 256K x 32/36
FLOW-THROUGH ZBT SRAM
FUNCTION
R/W#
BWa#
BWb#
BWc#
BWd#
READ
H
X
WRITE Byte “ a”
LL
H
WRITE Byte “ b”
LH
L
H
WRITE Byte “ c”
LH
H
L
H
WRITE Byte “ d”
L
HHH
L
WRITE All Bytes
L
WRITE ABORT/NOP
L
H
FUNCTION
R/W#
BWa#
BWb#
READ
H
X
WRITE Byte “ a”
LL
H
WRITE Byte “ b”
LHL
WRITE All Bytes
L
WRITE ABORT/NOP
L
H
INTERLEAVED BURST ADDRESS TABLE (MODE = NC OR HIGH)
FIRST ADDRESS (EXTERNAL)
SECOND ADDRESS (INTERNAL)
THIRD ADDRESS (INTERNAL)
FOURTH ADDRESS (INTERNAL)
X...X00
X...X01
X...X10
X...X11
X...X01
X...X00
X...X11
X...X10
X...X11
X...X00
X...X01
X...X11
X...X10
X...X01
X...X00
LINEAR BURST ADDRESS TABLE (MODE = LOW)
FIRST ADDRESS (EXTERNAL)
SECOND ADDRESS (INTERNAL)
THIRD ADDRESS (INTERNAL)
FOURTH ADDRESS (INTERNAL)
X...X00
X...X01
X...X10
X...X11
X...X01
X...X10
X...X11
X...X00
X...X10
X...X11
X...X00
X...X01
X...X11
X...X00
X...X01
X...X10
PARTIAL TRUTH TABLE FOR READ/WRITE COMMANDS (x18)
NOTE: Using R/W# and byte write(s), any one or more bytes may be
written.
NOTE: Using R/W# and byte write(s), any one or more bytes may be written.
PARTIAL TRUTH TABLE FOR READ/WRITE COMMANDS (x32/x36)
相關(guān)PDF資料
PDF描述
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