无码专区一ⅤA亚洲V专区在线,精品久久久一区二区,国产网红直播造人在线播放影院

您好，
買賣IC網(wǎng)歡迎您。
請(qǐng)登錄
免費(fèi)注冊(cè)

您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄25633 > MT80C31-25R (TEMIC SEMICONDUCTORS) 8-BIT, 25 MHz, MICROCONTROLLER, PQFP44 PDF資料下載

型號(hào)：	MT80C31-25R
廠商：	TEMIC SEMICONDUCTORS
元件分類：	微控制器/微處理器
英文描述：	8-BIT, 25 MHz, MICROCONTROLLER, PQFP44
文件頁(yè)數(shù)：	1212/1447頁(yè)
文件大?。?/td>	3788K
代理商：	MT80C31-25R

6437E–ATARM–23-Apr-13

10. Send The STOP_TRANSMISSION command writing HSMCI_ARG then

11. Wait for XFRDONE in HSMCI_SR register.

READ_MULTIPLE_BLOCK

Block Length is a Multiple of 4

Wait until the current command execution has successfully terminated.

Check that CMDRDY and NOTBUSY are asserted in HSMCI_SR.

Program the block length in the card. This value defines the value block_length.

Program the block length in the HSMCI configuration register with block_length value.

Set RDPROOF bit in HSMCI_MR to avoid overflow.

Program HSMCI_DMA register with the following fields:

– ROPT field is set to 0.

– OFFSET field is set to 0.

– CHKSIZE is user defined.

– DMAEN is set to true to enable DMAC hardware handshaking in the HSMCI. This bit

was previously set to false.

Issue a READ_MULTIPLE_BLOCK command.

Program the DMA Controller to use a list of descriptors:

Read the channel Register to choose an available (disabled) channel.

Clear any pending interrupts on the channel from the previous DMA transfer by

reading the DMAC_EBCISR register.

Program the channel registers in the Memory with the first descriptor. This descrip-

tor will be word oriented. This descriptor is referred to as LLI_W(n), standing for LLI

word oriented transfer for block n.

The LLI_W(n).DMAC_SADDRx field in memory must be set with the starting

address of the HSMCI_FIFO address.

The LLI_W(n).DMAC_DADDRx field in the memory must be word aligned.

Program LLI_W(n).DMAC_CTRLAx with the following field’s values:

–DST_WIDTH is set to WORD

–SRC_WIDTH is set to WORD

–SCSIZE must be set according to the value of HSMCI_DMA, CHKSIZE field.

–BTSIZE is programmed with block_length/4.

Program LLI_W(n).DMAC_CTRLBx with the following field’s values:

–DST_INCR is set to INCR.

–SRC_INCR is set to INCR.

–FC field is programmed with peripheral to memory flow control mode.

–SRC_DSCR is set to 0 (descriptor fetch is enabled for the SRC).

–DST_DSCR is set to TRUE (descriptor fetch is disabled for the DST).

–DIF and SIF are set with their respective layer ID. If SIF is different from DIF, the

DMA Controller is able to prefetch data and write HSMCI simultaneously.

Program LLI_W(n).DMAC_CFGx register for channel x with the following field’s

–FIFOCFG defines the watermark of the DMA channel FIFO.

相關(guān)PDF資料	PDF描述
MQ80C52TXXX-16/883	8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQFP44
MR80C52EXXX-20SCD	8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQCC44
MR80C32-16SHXXX	8-BIT, 16 MHz, MICROCONTROLLER, CQCC44
MD80C32EXXX-30/883	8-BIT, 30 MHz, MICROCONTROLLER, CDIP40
MR80C32E-16SC	8-BIT, 16 MHz, MICROCONTROLLER, CQCC44

相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
MT80C31BH	制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Intel 功能描述:
MT80C51BH	制造商:ROCHESTER 制造商全稱:ROCHESTER 功能描述:CMOS SINGLE - CHIP 8-BIT MICROCOMPUTER 64K program Memory Space
MT80C51FB	制造商:Rochester Electronics LLC 功能描述:- Bulk
MT80C51FB/B	制造商:Intel 功能描述:
MT80GB	制造商:Datak Corporation 功能描述:

發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

(若只采購(gòu)一條型號(hào)，填寫一行即可)

*型號(hào)	*數(shù)量	廠商	批號(hào)	封裝

采購(gòu)需求

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

我的聯(lián)系方式

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)