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| 型號(hào)： | MT90220 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Octal IMA/UNI PHY Device(八端口 IMA/UNI 物理層設(shè)備（八端口ATM IMA和UNI處理器）) |
| 中文描述： | 八路IMA的/單向物理層設(shè)備（八端口IMA的/單向物理層設(shè)備（八端口自動(dòng)柜員機(jī)IMA的和單向處理器）） |
| 文件頁(yè)數(shù)： | 70/118頁(yè) |
| 文件大小： | 310K |
| 代理商： | MT90220 |
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MT90220
62
7.7
RX Delay Registers Description
Tables 66 to 75 describe the
RX Delay
registers.
Address (Hex):
Synchronized access
Reset Value (Bin):
280
1X000000
Bit #
Type
Description
7
R
Upon a write to this register, the bit will go to 0 and will return to 1 when the transfer is
completed
Toggle Bit.
Write 0 to initiate a transfer from the MT90220 registers to the external RAM.
Write 1 to initiate a transfer from the external RAM to the MT90220 registers.
Reserved, write 0 for normal operation.
When Test Mode bit is 1; write 1 to enable the direct addressing mode to the External
SRAM.
When Test Mode bit is 1; write 0 for normal operation.Write 1 for disabling all access to
the external RAM except for the uP port (for RAM test purposes)
When bit 1 is 1, there is no access to the external RAM (no reset or read or write action
done).
When bit 1 is 0 and bit 0 is 0, then the external RAM is initialized.
When bit 1 is 0 and bit 0 is 1, then a read or write access to the external RAM is
performed, as defined by bit 5.
6
5
R
R/W
4
3
R/W
R/W
2
R/W
1:0
R/W
Table 66 - RX External SRAM Control Register
Address (Hex):
Direct access
281
Used to increment or decrement the recombiner delay for an IMA Group.
The value is in the Guardband/Delta Delay register
00
Reset Value (Hex):
Bit #
Type
Description
7
R/W
Write a 1 to decrement the recombiner delay of IMA Group #3. The bit will return to 0
when the delay is adjusted. Writing a 0 has no effect.
Write a 1 to increment the recombiner delay of IMA Group #3. The bit will return to 0 when
the delay is adjusted. Writing a 0 has no effect.
Write a 1 to decrement the recombiner delay of IMA Group #2. The bit will return to 0
when the delay is adjusted. Writing a 0 has no effect.
Write a 1 to increment the recombiner delay of IMA Group #2. The bit will return to 0 when
the delay is adjusted. Writing a 0 has no effect.
Write a 1 to decrement the recombiner delay of IMA Group #1. The bit will return to 0
when the delay is adjusted. Writing a 0 has no effect.
Write a 1 to increment the recombiner delay of IMA Group #1. The bit will return to 0 when
the delay is adjusted. Writing a 0 has no effect.
Write a 1 to decrement the recombiner delay of IMA Group #0. The bit will return to 0
when the delay is adjusted. Writing a 0 has no effect.
Write a 1 to increment the recombiner delay of IMA Group #0. The bit will return to 0 when
the delay is adjusted. Writing a 0 has no effect.
6
R/W
5
R/W
4
R/W
3
R/W
2
R/W
1
R/W
0
R/W
Table 67 - Increment/Decrement Delay Control Register
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT90221 | Quad IMA/UNI PHY Device(四端口 IMA/UNI 物理層設(shè)備（四端口ATM IMA和UNI處理器）) |
| MT90401 | SONET/SDH System Synchronizer(SONET/SDH 系統(tǒng)同步裝置（由一個(gè)數(shù)字鎖相環(huán)組成）) |
| MT9040 | T1/E1 Synchronizer(T1/E1 系統(tǒng)同步裝置（由一個(gè)數(shù)字鎖相環(huán)組成）) |
| MT9041A | () |
| MT9041B | T1/E1 System Synchronizer(T1/E1系統(tǒng)同步裝置（由一個(gè)數(shù)字鎖相環(huán)組成）) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90220AL | 制造商:Zarlink Semiconductor Inc 功能描述:I.C. |
| MT90220ALX01 | 制造商:Mitel Networks Corporation 功能描述: |
| MT90221 | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Quad IMA/UNI PHY Device |
| MT90221AL | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Quad IMA/UNI PHY Device |
| MT90222 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:4/8/16 Port IMA/TC PHY Device |
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