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參數(shù)資料
| 型號： | MT90870 |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | Flexible 12 k Digital Switch (F12kDX) |
| 中文描述： | 靈活的12畝數(shù)字交換機（F12kDX） |
| 文件頁數(shù)： | 47/86頁 |
| 文件大?。?/td> | 2093K |
| 代理商： | MT90870 |
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MT90870
Data Sheet
47
Zarlink Semiconductor Inc.
Test Data Input (TDi)
Depending on the previously applied data to the
TMS
input, the serial input data applied to the
TDi
port
is connected either to the Instruction Register or to a Test Data Register. Both registers are described in
a Section 11.2, TAP Registers. The applied input data is sampled at the rising edge of TCK pulses. This
pin is internally pulled to V
DD_IO
when not driven from an external source.
Test Data Output (TDo)
Depending on the previously applied sequence to the
TMS
input, the contents of either the instruction
register or data register are serially shifted out towards the
TDo
. The data out of the
TDo
is clocked on
the falling edge of the
TCK
pulses. When no data is shifted through the boundary scan cells, the
TDo
output is set to a high impedance state.
Test Reset (TRST)
TRST
provides an asynchronous Reset to the JTAG scan structure. This pin is internally pulled to V
DD_IO
when not driven from an external source.
11.2 TAP Registers
The MT90870 uses the public instructions defined in the IEEE 1149.1 standard with the provision of an Instruction
Register and three Test Data Registers.
11.2.1 Test Instruction Register
The JTAG interface contains a four-bit instruction register. Instructions are serially loaded into the Instruction
Register from the
TDi
pin when the TAP Controller is in the shift-IR state. Instructions are subsequently decoded to
achieve two basic functions: to select the Test Data Register to operate while the instruction is current, and to
define the serial Test Data Register path to shift data between
TDi
and
TDo
during data register scanning.
11.2.2 Test Data Registers
11.2.2.1 The Boundary-Scan Register
The Boundary-Scan register consists of a series of Boundary-Scan cells arranged to form a scan path around the
boundary of the MT90870 core logic.
11.2.2.2 The Bypass Register
The Bypass register is a single stage shift register to provide a one-bit path from
TDi
to
TDo
.
11.2.2.3 The Device Identification Register
The JTAG device ID for the MT90870 is 0087014B
H
.
Version, Bits <31:28>: 0000
Part No., Bits <27:12>: 0000 1000 0111 0000
Manufacturer ID, Bits <11:1>: 0001 0100 101
Header, Bit <0> (LSB): 1
11.3 Boundary Scan Description Language (BSDL) File
A Boundary Scan Description Language (BSDL) file is available from Zarlink Semiconductor to aid in the use of the
IEEE 1149.1 test interface.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90870AG | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 12K X 12K/8K X 4K 1.8V/3.3V 272BGA - Trays |
| MT90870AG2 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 12K X 12K/8K X 4K 1.8V/3.3V 272BGA - Trays |
| MT90871 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Flexible 8K Digital Switch (F8KDX) |
| MT90871AV | 制造商:Microsemi Corporation 功能描述:FLEXIBLE 8K DIGITAL SWITCH 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC DGTL SWITCH F8KDX 196PBGA 制造商:Microsemi Corporation 功能描述:IC DGTL SWITCH F8KDX 196PBGA |
| MT90871AV2 | 制造商:Microsemi Corporation 功能描述:PB FREE FLEXIBLE 8K DIGITAL SWITCH - Bulk 制造商:Microsemi Corporation 功能描述:IC, TDM SWITCH 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC DGTL SWITCH F8KDX 196PBGA 制造商:Microsemi Corporation 功能描述:IC DGTL SWITCH F8KDX 196PBGA |
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