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參數(shù)資料
| 型號(hào)： | MT90870 |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | Flexible 12 k Digital Switch (F12kDX) |
| 中文描述： | 靈活的12畝數(shù)字交換機(jī)（F12kDX） |
| 文件頁數(shù)： | 52/86頁 |
| 文件大?。?/td> | 2093K |
| 代理商： | MT90870 |
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MT90870
Data Sheet
52
Zarlink Semiconductor Inc.
13.0 Detailed Register Description
This section describes the registers that are used in the device.
13.1 Control Register (CR)
Address 0000h.
The control register defines which memory is to be accessed. It initiates the memory block programming mode and
selects the Backplane data rate mode. The Control Register (
CR
) is configured as follows:
Bit
Name
Reset
Description
15-9
8
Reserved
FPW
0
0
Reserved
.
Frame Pulse Width
When LOW, an input frame pulse width of 122 ns shall be applied to FP8i. When
HIGH, an input frame pulse width of 244 ns shall be applied to FP8i.
32 MHz Mode
When LOW, Backplane streams (BSTi0-31 and BSTo0-31) may be individually
programmed for data-rates of 2, 4, 8, or 16 Mb/s. When HIGH, the Backplane
streams (BSTi0-15 and BSTo0-15) operate in 32Mb/s mode.
8 MHz Input Clock Polarity
The input frame boundary
MUST
be aligned to the C8i clock rising edge. This bit,
C8IPOL,
MUST
be set HIGH to achieve correct frame boundary alignment. If this
bit is LOW, the input frame boundary alignment will not work correctly.
Output Clock Polarity
When set LOW, the output clock is the same polarity as the input clock. When set
HIGH, the output clock is inverted. This applies to both 8 MHz (C8o)and 16 MHz
(C16o) output clocks.
Memory Block Programming
When LOW, the memory block programming mode is disabled. When HIGH, the
connection memory block programming mode is ready to program the Local
Connection Memory (LCM), and the Backplane Connection Memory (BCM).
Output Stand By
This bit enables the BSTo0 - 31 and the LSTo0 - 15 serial outputs
.
7
MODE32
0
6
C8IPOL
0
5
COPOL
0
4
MBP
0
3
OSB
0
When set LOW, the BSTo0-31 and LSTo0-15 are driven high or high impedance,
dependent on the BORS and LORS pin settings respectively, and BCSTo0-3 and
LCSTo0-1 are driven low.
When set HIGH, the BSTo0-31, LSTo0-15, BCSTo0-3 and LCSTo0-1 are enabled.
Table 16 - Control Register Bits
Output Control with ODE pin and OSB bit
ODE Pin
OSB bit
BSTo0 - 31, LSTo0 - 15
0
1
1
X
0
1
Disable
Disable
Enable
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| MT90870AG | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 12K X 12K/8K X 4K 1.8V/3.3V 272BGA - Trays |
| MT90870AG2 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 12K X 12K/8K X 4K 1.8V/3.3V 272BGA - Trays |
| MT90871 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Flexible 8K Digital Switch (F8KDX) |
| MT90871AV | 制造商:Microsemi Corporation 功能描述:FLEXIBLE 8K DIGITAL SWITCH 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC DGTL SWITCH F8KDX 196PBGA 制造商:Microsemi Corporation 功能描述:IC DGTL SWITCH F8KDX 196PBGA |
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