參數(shù)資料
型號(hào)： MT90870
廠商： Zarlink Semiconductor Inc.
英文描述： Flexible 12 k Digital Switch (F12kDX)
中文描述： 靈活的12畝數(shù)字交換機(jī)（F12kDX）
文件頁(yè)數(shù)： 9/86頁(yè)
文件大?。?/td> 2093K
代理商： MT90870
MT90870
Data Sheet
9
Zarlink Semiconductor Inc.
Changes Summary
The following table captures the changes from the December 2002 issue.
Page
Item
Change
14
Pin Description
, C8i
The internal frame boundary alignment description
is changed from the clock rising or falling edge to
rising edge only. Also added description to specify
setting the C8IPOL bit in the Control Register to
one for clock rising edge alignment operation.
21
Figure 6, Local Port Timing Diagram for
2,4,8 and 16 Mb/s stream rates
Changed C8i frame boundary active edge from
falling to rising edge.
23
Figure 7, Backplane Port Timing Diagram
for 2, 4, 8, 16 and 32 Mb/s stream rates
Changed C8i frame boundary active edge from
falling to rising edge.
23
Section 2.3. Backplane Frame Pulse Input
and Master Input Clock Timing
Removed the falling clock edge frame boundary
alignment option.
24
Figure 8, Backplane and Local Frame
Pulse Alignment for Data Rates of 2 Mb/s,
4 Mb/s, 8 Mb/s and 16 Mb/s
Changed C8i frame boundary active edge from
falling to rising edge.
25
Figure 9, Backplane and Local Input
Channel Delay Timing Diagram (8 Mb/s)
Changed FPo and C8o to FPi and C8i respectively
and showing rising C8i frame boundary active
edge.
26
Figure 10, Backplane and Local Input Bit
Delay Timing Diagram for Data Rate of
16 Mb/s
Changed FPo and C8o to FPi and C8i respectively
and showing rising C8i frame boundary active
edge.
27
Figure 11, Backplane and Local Input Bit
Delay Timing Diagram for Data Rate of
8 Mb/s
Changed FPo and C8o to FPi and C8i
respectively.
52
Section 13.1. Control Register (CR) Bit 6,
C8IPOL
Changed description to specify Bit 6, C8IPOL
must be set high for rising clock edge frame
boundary alignment operation.
53
Figure 18, Frame Boundary Conditions,
ST- BUS Operation
Removed waveforms showing C8i falling edge
frame boundary option.
54
Figure 19, Frame Boundary Conditions,
GCI - BUS Operation
Removed waveforms showing C8i falling edge
frame boundary option.
73
Backplane and Local Clock Timing
:
Item 2, Backplane Frame Pulse Setup
Time before C8i clock falling edge
Item 3, Backplane Frame Pulse Hold Time
from C8i clock falling edge
Item 2, Backplane Frame Pulse Setup Time
before C8i clock falling edge changed to
Backplane Frame Pulse Setup Time before C8i
clock rising edge.
Item 3, Backplane Frame Pulse Hold Time from
C8i clock falling edge changed to Backplane
Frame Pulse Hold Time from C8i clock rising
edge.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT90870AG 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 12K X 12K/8K X 4K 1.8V/3.3V 272BGA - Trays
MT90870AG2 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 12K X 12K/8K X 4K 1.8V/3.3V 272BGA - Trays
MT90871 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:Flexible 8K Digital Switch (F8KDX)
MT90871AV 制造商:Microsemi Corporation 功能描述:FLEXIBLE 8K DIGITAL SWITCH 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC DGTL SWITCH F8KDX 196PBGA 制造商:Microsemi Corporation 功能描述:IC DGTL SWITCH F8KDX 196PBGA
MT90871AV2 制造商:Microsemi Corporation 功能描述:PB FREE FLEXIBLE 8K DIGITAL SWITCH - Bulk 制造商:Microsemi Corporation 功能描述:IC, TDM SWITCH 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC DGTL SWITCH F8KDX 196PBGA 制造商:Microsemi Corporation 功能描述:IC DGTL SWITCH F8KDX 196PBGA
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