- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄367700 > P60ARM-IG (Zarlink Semiconductor Inc.) Low power, general purpose 32-bit RISC microprocessor PDF資料下載
參數(shù)資料
| 型號： | P60ARM-IG |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | Low power, general purpose 32-bit RISC microprocessor |
| 中文描述： | 低功耗，通用32位RISC微處理器 |
| 文件頁數(shù)： | 95/120頁 |
| 文件大?。?/td> | 1275K |
| 代理商： | P60ARM-IG |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁當前第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁
Boundary Scan Test Interface
91
The EXTEST instruction connects the BS register between
TDI
and
TDO
.
When the instruction register is loaded with the EXTEST instruction, all the boundary-scan cells are placed
in their test mode of operation.
In the CAPTURE-DR state, inputs from the system pins and outputs from the boundary-scan output cells
to the system pins are captured by the boundary-scan cells. In the SHIFT-DR state, the previously captured
test data is shifted out of the BS register via the
TDO
pin, whilst new test data is shifted in via the
to the BS register parallel input latch. In the UPDATE-DR state, the new test data is transferred into the BS
register parallel output latch. Note that this data is applied immediately to the system logic and system
pins. The first EXTEST vector should be clocked into the boundary-scan register, using the SAMPLE/
PRELOAD instruction, prior to selecting INTEST to ensure that known data is applied to the system logic.
TDI
pin
8.5.2 SAMPLE/PRELOAD (0011)
The BS (boundary-scan) register is placed in normal (system) mode by the SAMPLE/PRELOAD
instruction.
The SAMPLE/PRELOAD instruction connects the BS register between
TDI
and
TDO
.
When the instruction register is loaded with the SAMPLE/PRELOAD instruction, all the boundary-scan
cells are placed in their normal system mode of operation.
In the CAPTURE-DR state, a snapshot of the signals at the boundary-scan cells is taken on the rising edge
of
TCK
. Normal system operation is unaffected. In the SHIFT-DR state, the sampled test data is shifted out
of the BS register via the
TDO
pin, whilst new data is shifted in via the
parallel input latch. In the UPDATE-DR state, the preloaded data is transferred into the BS register parallel
output latch. Note that this data is not applied to the system logic or system pins while the SAMPLE/
PRELOAD instruction is active. This instruction should be used to preload the boundary-scan register with
known data prior to selecting the INTEST or EXTEST instructions (see the table below for appropriate
guard values to be used for each boundary-scan cell).
TDI
pin to preload the BS register
8.5.3 CLAMP (0101)
The CLAMP instruction connects a 1 bit shift register (the BYPASS register) between
TDI
and
TDO
.
When the CLAMP instruction is loaded into the instruction register, the state of all output signals is defined
by the values previously loaded into the boundary-scan register. A guarding pattern (specified for this
device at the end of this section) should be pre-loaded into the boundary-scan register using the SAMPLE/
PRELOAD instruction prior to selecting the CLAMP instruction.
In the CAPTURE-DR state, a logic 0 is captured by the bypass register. In the SHIFT-DR state, test data is
shifted into the bypass register via
TDI
and out via
TDO
bit shifted out will be a zero. The bypass register is not affected in the UPDATE-DR state.
after a delay of one
TCK
cycle. Note that the first
8.5.4 HIGHZ (0111)
The HIGHZ instruction connects a 1 bit shift register (the BYPASS register) between
TDI
and
TDO
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| P60ARM-B | Low power, general purpose 32-bit RISC microprocessor |
| P60A | 60W DC-DC Converter P60A-Series |
| P60A12D05P | 60W DC-DC Converter P60A-Series |
| P60A12D12P | 60W DC-DC Converter P60A-Series |
| P60A12D15P | 60W DC-DC Converter P60A-Series |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P-60AS/A18 | 功能描述:BATTERY NICAD 2/3A 600MAH W/TAB RoHS:否 類別:電池產(chǎn)品 >> 電池，充電式（蓄電池） 系列:- MSDS 材料安全數(shù)據(jù)表:Nickel Metal Hydride Battery MSDS 標準包裝:1,000 系列:TWICELL 電池化學:鎳金屬氫化物 電池大小:AAA 電壓 - 額定:1.2V 容量:930mAh 尺寸/尺寸:- 端接類型:焊片 放電速率:186mA 標準充電電流:100mA 標準充電時間:16小時 重量:0.029 磅（13.15g） 裝運信息:- 其它名稱:SY153T |
| P60AS302 | 制造商:APEM 功能描述: |
| P60AS632-8C | 制造商:NYLOK 功能描述: |
| P60AS701 | 功能描述:旋鈕開關(guān) 10POS BCD 0.15A 24V RoHS:否 制造商:C&K Components 位置數(shù)量:5 卡片組數(shù)量: 每卡片組極數(shù):2 電流額定值:250 mA 電壓額定值:125 V 指數(shù)角: 觸點類型: 觸點形式:DPST 端接類型:Solder 安裝類型:Panel 觸點電鍍:Silver |
| P60AS701TR | 功能描述:旋鈕開關(guān) 10POS 0.15A 24VDC RoHS:否 制造商:C&K Components 位置數(shù)量:5 卡片組數(shù)量: 每卡片組極數(shù):2 電流額定值:250 mA 電壓額定值:125 V 指數(shù)角: 觸點類型: 觸點形式:DPST 端接類型:Solder 安裝類型:Panel 觸點電鍍:Silver |
發(fā)布緊急采購，3分鐘左右您將得到回復。