參數(shù)資料
型號(hào): PCA9698DGG,512
廠商: NXP Semiconductors
文件頁(yè)數(shù): 23/48頁(yè)
文件大?。?/td> 0K
描述: IC I/O EXPANDER I2C 40B 56TSSOP
產(chǎn)品培訓(xùn)模塊: I²C Bus Fundamentals
特色產(chǎn)品: NXP - I2C Interface
標(biāo)準(zhǔn)包裝: 35
接口: I²C
輸入/輸出數(shù): 40
中斷輸出:
頻率 - 時(shí)鐘: 1MHz
電源電壓: 2.3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 56-TFSOP(0.240",6.10mm 寬)
供應(yīng)商設(shè)備封裝: 56-TSSOP
包裝: 管件
包括: POR
產(chǎn)品目錄頁(yè)面: 826 (CN2011-ZH PDF)
其它名稱: 568-3241-5
935278614512
PCA9698DGG
PCA9698
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 3 — 3 August 2010
3 of 48
NXP Semiconductors
PCA9698
40-bit Fm+ I2C-bus advanced I/O port with RESET, OE and INT
4.
Ordering information
5.
Block diagram
Table 1.
Ordering information
Tamb = 40 °C to +85 °C
Type number
Topside mark
Package
Name
Description
Version
PCA9698DGG
TSSOP56
plastic thin shrink small outline package; 56 leads;
body width 6.1 mm
SOT364-1
PCA9698BS
HVQFN56
plastic thermal enhanced very thin quad flat package;
no leads; 56 terminals; body 8
× 8 × 0.85 mm
SOT684-1
Remark: All I/Os are set to inputs at power-up and RESET.
Fig 1.
Block diagram of PCA9698
PCA9698
002aab935
LOW PASS
INPUT
FILTERS
SCL
SDA
ADDRESS
DECODER
AD0
AD1
AD2
POWER-ON
RESET
I2C-BUS/SMBUS
CONTROL
RESET
VDD
INPUT/
OUTPUT
PORTS
BANK 0
LP FILTER
INT/SMBALERT
VSS
8-bit
IO0_0
IO0_1
IO0_2
IO0_3
IO0_4
IO0_5
IO0_6
IO0_7
BANK 1
BANK 2
BANK 3
read pulse 0
write pulse 0
INPUT/
OUTPUT
PORTS
BANK 4
8-bit
IO4_0
IO4_1
IO4_2
IO4_3
IO4_4
IO4_5
IO4_6
IO4_7
read pulse 4
write pulse 4
OE
INTERRUPT
MANAGEMENT
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