參數(shù)資料
型號: PCA9698DGG,512
廠商: NXP Semiconductors
文件頁數(shù): 46/48頁
文件大?。?/td> 0K
描述: IC I/O EXPANDER I2C 40B 56TSSOP
產(chǎn)品培訓模塊: I²C Bus Fundamentals
特色產(chǎn)品: NXP - I2C Interface
標準包裝: 35
接口: I²C
輸入/輸出數(shù): 40
中斷輸出:
頻率 - 時鐘: 1MHz
電源電壓: 2.3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 56-TFSOP(0.240",6.10mm 寬)
供應商設(shè)備封裝: 56-TSSOP
包裝: 管件
包括: POR
產(chǎn)品目錄頁面: 826 (CN2011-ZH PDF)
其它名稱: 568-3241-5
935278614512
PCA9698DGG
PCA9698
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 3 — 3 August 2010
7 of 48
NXP Semiconductors
PCA9698
40-bit Fm+ I2C-bus advanced I/O port with RESET, OE and INT
[1]
HVQFN56 package die supply ground is connected to both VSS pins and exposed center pad. VSS pins
must be connected to supply ground for proper device operation. For enhanced thermal, electrical, and
board level performance, the exposed pad needs to be soldered to the board using a corresponding
thermal pad on the board and for proper heat conduction through the board, thermal vias need to be
incorporated in the printed-circuit board in the thermal pad region.
7.
Functional description
7.1 Device address
Following a START condition the bus master must send the address of the slave it is
accessing and the operation it wants to perform (read or write). The address of the
PCA9698 is shown in Figure 5. Slave address pins AD2, AD1 and AD0 choose 1 of
64 slave addresses. To conserve power, no internal pull-up resistors are incorporated on
AD2, AD1 and AD0. Address values depending on AD2, AD1 and AD0 can be found in
The last bit of the first byte defines the operation to be performed. When set to logic 1 a
read is selected while a logic 0 selects a write operation.
AD2
29
22
input
address input 2
OE
30
23
input
active LOW output enable
INT/SMBALERT
55
48
output
active LOW interrupt output/
active LOW SMBus alert
output
RESET
56
49
input
active LOW reset input
Table 2.
Pin description …continued
Symbol
Pin
Type
Description
TSSOP56
HVQFN56
Fig 5.
PCA9698 device address
R/W
002aab937
A6
A5
A4
A3
A2
A1
A0
programmable
slave address
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