參數(shù)資料
型號： PCA9698DGG,512
廠商： NXP Semiconductors
文件頁數(shù)： 37/48頁
文件大小： 0K
描述： IC I/O EXPANDER I2C 40B 56TSSOP
產(chǎn)品培訓模塊： I²C Bus Fundamentals
特色產(chǎn)品： NXP - I2C Interface
標準包裝： 35
接口： I²C
輸入/輸出數(shù)： 40
中斷輸出： 是
頻率 - 時鐘： 1MHz
電源電壓： 2.3 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 56-TFSOP（0.240"，6.10mm 寬）
供應商設備封裝： 56-TSSOP
包裝： 管件
包括： POR
產(chǎn)品目錄頁面： 826 (CN2011-ZH PDF)
其它名稱： 568-3241-5
935278614512
PCA9698DGG
42
7810C–AVR–10/12
Atmel ATmega328P [Preliminary]
9.11
Register Description
9.11.1
SMCR – Sleep Mode Control Register
The Sleep Mode Control Register contains control bits for power management.
Bits 7..4 Res: Reserved Bits
These bits are unused bits in the ATmega328P, and will always read as zero.
Bits 3..1 – SM2..0: Sleep Mode Select Bits 2, 1, and 0
These bits select between the five available sleep modes as shown in Table 9-2.
Note:
1. Standby mode is only recommended for use with external crystals or resonators.
Bit 0 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s
purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of
the SLEEP instruction and to clear it immediately after waking up.
9.11.2
MCUCR – MCU Control Register
Bit 6 – BODS: BOD Sleep
The BODS bit must be written to logic one in order to turn off BOD during sleep, see Table 9-1
on page 37. Writing to the BODS bit is controlled by a timed sequence and an enable bit,
BODSE in MCUCR. To disable BOD in relevant sleep modes, both BODS and BODSE must first
be set to one. Then, to set the BODS bit, BODS must be set to one and BODSE must be set to
zero within four clock cycles.
Bit
7
65
43
21
0
––
SM2
SM1
SM0
SE
SMCR
Read/Write
R
R/W
Initial Value
0
Table 9-2.
Sleep Mode Select
SM2
SM1
SM0
Sleep Mode
000
Idle
0
1
ADC Noise Reduction
010
Power-down
011
Power-save
100
Reserved
101
Reserved
1
0
Standby(1)
1
External Standby(1)
Bit
7
6
5
4
3
2
1
0
–BODS
BODSE
PUD
–
IVSEL
IVCE
MCUCR
Read/Write
R
R/W
R
R/W
Initial Value
0
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